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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: bp.renesas.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYCPR01MB5933.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: cdf3f213-5662-4905-03d4-08db883832f2 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Jul 2023 09:11:55.7201 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iN0b03NwfxsTEKIdP7yEGQVA4kjrmC0K1Mz7zJAJcSirI/l5odrRST+J6qdFjhg5+jLSWjsm7qJRtzuFwxN3ZtJySWWbMUYzd3VnzlpWPx8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: OSZPR01MB8234 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Arnd, Thanks for the patch. It is inline with[1] [1] https://patchwork.ozlabs.org/project/linux-pwm/patch/ac8d6190-06ae-b538= -1293-07efedbfe94e@gmail.com/#3150120 > -----Original Message----- > From: Arnd Bergmann > Sent: Wednesday, July 19, 2023 10:02 AM > To: William Breathitt Gray ; Thierry Reding > ; Lee Jones ; Uwe Kleine-K=F6ni= g > ; Biju Das > Cc: Arnd Bergmann ; Peter Robinson > ; linux-iio@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-pwm@vger.kernel.org > Subject: [PATCH] mfd: rz-mtu3: link time dependencies >=20 > From: Arnd Bergmann >=20 > The new set of drivers for RZ/G2L MTU3a tries to enable compile-testing > the individual client drivers even when the MFD portion is disabled but > gets it wrong, causing a link failure when the core is in a loadable > module but the other drivers are built-in: >=20 > x86_64-linux-ld: drivers/pwm/pwm-rz-mtu3.o: in function > `rz_mtu3_pwm_apply': > pwm-rz-mtu3.c:(.text+0x4bf): undefined reference to > `rz_mtu3_8bit_ch_write' > x86_64-linux-ld: pwm-rz-mtu3.c:(.text+0x509): undefined reference to > `rz_mtu3_disable' >=20 > arm-linux-gnueabi-ld: drivers/counter/rz-mtu3-cnt.o: in function > `rz_mtu3_cascade_counts_enable_get': > rz-mtu3-cnt.c:(.text+0xbec): undefined reference to > `rz_mtu3_shared_reg_read' >=20 > It seems better not to add the extra complexity here but instead just > use a normal hard dependency, so remove the #else portion in the header > along with the "|| COMPILE_TEST". This could also be fixed by having > slightly more elaborate Kconfig dependencies or using the cursed > 'IS_REACHABLE()' helper, but in practice it's already possible to > compile-test all these drivers by enabling the mtd portion. Typo "mtd"->"mfd" Otherwise looks good to me. Reviewed-by: Biju Das Cheers, Biju >=20 > Fixes: 254d3a727421c ("pwm: Add Renesas RZ/G2L MTU3a PWM driver") > Fixes: 0be8907359df4 ("counter: Add Renesas RZ/G2L MTU3a counter > driver") > Fixes: 654c293e1687b ("mfd: Add Renesas RZ/G2L MTU3a core driver") > Signed-off-by: Arnd Bergmann > --- > drivers/counter/Kconfig | 2 +- > drivers/pwm/Kconfig | 2 +- > include/linux/mfd/rz-mtu3.h | 66 ------------------------------------- > 3 files changed, 2 insertions(+), 68 deletions(-) >=20 > diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index > 62962ae84b77d..497bc05dca4df 100644 > --- a/drivers/counter/Kconfig > +++ b/drivers/counter/Kconfig > @@ -92,7 +92,7 @@ config MICROCHIP_TCB_CAPTURE >=20 > config RZ_MTU3_CNT > tristate "Renesas RZ/G2L MTU3a counter driver" > - depends on RZ_MTU3 || COMPILE_TEST > + depends on RZ_MTU3 > help > Enable support for MTU3a counter driver found on Renesas RZ/G2L > alike > SoCs. This IP supports both 16-bit and 32-bit phase counting > mode diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index > 6210babb0741a..8ebcddf91f7b7 100644 > --- a/drivers/pwm/Kconfig > +++ b/drivers/pwm/Kconfig > @@ -505,7 +505,7 @@ config PWM_ROCKCHIP >=20 > config PWM_RZ_MTU3 > tristate "Renesas RZ/G2L MTU3a PWM Timer support" > - depends on RZ_MTU3 || COMPILE_TEST > + depends on RZ_MTU3 > depends on HAS_IOMEM > help > This driver exposes the MTU3a PWM Timer controller found in > Renesas diff --git a/include/linux/mfd/rz-mtu3.h b/include/linux/mfd/rz- > mtu3.h index c5173bc062701..8421d49500bf4 100644 > --- a/include/linux/mfd/rz-mtu3.h > +++ b/include/linux/mfd/rz-mtu3.h > @@ -151,7 +151,6 @@ struct rz_mtu3 { > void *priv_data; > }; >=20 > -#if IS_ENABLED(CONFIG_RZ_MTU3) > static inline bool rz_mtu3_request_channel(struct rz_mtu3_channel *ch) > { > mutex_lock(&ch->lock); > @@ -188,70 +187,5 @@ void rz_mtu3_32bit_ch_write(struct rz_mtu3_channel > *ch, u16 off, u32 val); void rz_mtu3_shared_reg_write(struct > rz_mtu3_channel *ch, u16 off, u16 val); void > rz_mtu3_shared_reg_update_bit(struct rz_mtu3_channel *ch, u16 off, > u16 pos, u8 val); > -#else > -static inline bool rz_mtu3_request_channel(struct rz_mtu3_channel *ch) > -{ > - return false; > -} > - > -static inline void rz_mtu3_release_channel(struct rz_mtu3_channel *ch) > -{ -} > - > -static inline bool rz_mtu3_is_enabled(struct rz_mtu3_channel *ch) -{ > - return false; > -} > - > -static inline void rz_mtu3_disable(struct rz_mtu3_channel *ch) -{ -} > - > -static inline int rz_mtu3_enable(struct rz_mtu3_channel *ch) -{ > - return 0; > -} > - > -static inline u8 rz_mtu3_8bit_ch_read(struct rz_mtu3_channel *ch, u16 > off) -{ > - return 0; > -} > - > -static inline u16 rz_mtu3_16bit_ch_read(struct rz_mtu3_channel *ch, u16 > off) -{ > - return 0; > -} > - > -static inline u32 rz_mtu3_32bit_ch_read(struct rz_mtu3_channel *ch, u16 > off) -{ > - return 0; > -} > - > -static inline u16 rz_mtu3_shared_reg_read(struct rz_mtu3_channel *ch, > u16 off) -{ > - return 0; > -} > - > -static inline void rz_mtu3_8bit_ch_write(struct rz_mtu3_channel *ch, > u16 off, u8 val) -{ -} > - > -static inline void rz_mtu3_16bit_ch_write(struct rz_mtu3_channel *ch, > u16 off, u16 val) -{ -} > - > -static inline void rz_mtu3_32bit_ch_write(struct rz_mtu3_channel *ch, > u16 off, u32 val) -{ -} > - > -static inline void rz_mtu3_shared_reg_write(struct rz_mtu3_channel *ch, > u16 off, u16 val) -{ -} > - > -static inline void rz_mtu3_shared_reg_update_bit(struct rz_mtu3_channel > *ch, > - u16 off, u16 pos, u8 val) > -{ > -} > -#endif >=20 > #endif /* __MFD_RZ_MTU3_H__ */ > -- > 2.39.2