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Message-ID: <56ef499c-d47a-19a1-2542-5e8a7c86d510@linaro.org>
Date:   Wed, 19 Jul 2023 11:20:42 +0200
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Subject: Re: [PATCH 1/3] usb: dwc2: Add platform specific data for Intel
 Stratix10 platform
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To:     "Li, Meng" <Meng.Li@windriver.com>,
        "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "conor+dt@kernel.org" <conor+dt@kernel.org>,
        "dinguyen@kernel.org" <dinguyen@kernel.org>,
        "hminas@synopsys.com" <hminas@synopsys.com>,
        "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
References: <20230719025509.3007986-1-Meng.Li@windriver.com>
 <20230719025509.3007986-2-Meng.Li@windriver.com>
 <ec93a939-883d-5778-2f32-69eb370c9768@linaro.org>
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From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <PH0PR11MB519152C26157460397FA73E2F139A@PH0PR11MB5191.namprd11.prod.outlook.com>
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On 19/07/2023 11:10, Li, Meng wrote:
> 
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Sent: Wednesday, July 19, 2023 2:40 PM
>> To: Li, Meng <Meng.Li@windriver.com>; gregkh@linuxfoundation.org;
>> robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
>> dinguyen@kernel.org; hminas@synopsys.com; linux-usb@vger.kernel.org;
>> devicetree@vger.kernel.org
>> Cc: linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH 1/3] usb: dwc2: Add platform specific data for Intel Stratix10
>> platform
>>
>> CAUTION: This email comes from a non Wind River email account!
>> Do not click links or open attachments unless you recognize the sender and
>> know the content is safe.
>>
>> On 19/07/2023 04:55, Meng Li wrote:
>>> Intel Stratix10 is very the same with Agilex platform, the DWC2 IP on
>>> the Stratix platform also does not support clock-gating. So, refer to
>>> commit 3d8d3504d233("usb: dwc2: Add platform specific data for Intel's
>>> Agilex"), add platform specific data for Intel Stratix10 platform.
>>>
>>> Signed-off-by: Meng Li <Meng.Li@windriver.com>
>>> ---
>>>  drivers/usb/dwc2/params.c | 2 ++
>>>  1 file changed, 2 insertions(+)
>>>
>>> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
>>> index 8eab5f38b110..3d085ae1ecd8 100644
>>> --- a/drivers/usb/dwc2/params.c
>>> +++ b/drivers/usb/dwc2/params.c
>>> @@ -267,6 +267,8 @@ const struct of_device_id dwc2_of_match_table[] = {
>>>         .data = dwc2_set_stm32mp15_hsotg_params },
>>>       { .compatible = "intel,socfpga-agilex-hsotg",
>>>         .data = dwc2_set_socfpga_agilex_params },
>>> +     { .compatible = "intel,socfpga-stratix10-hsotg",
>>> +       .data = dwc2_set_socfpga_agilex_params },
>>
>> NAK. I already wrote why.
> 
> If I don't add the SoC specific compatible entry, how I use to the specific data on Stratix10 platform.

You do not have match data specific to Stratix10. I explained already
that I expect them to be compatible. I gave you example how it is done.
What is unclear in that example?

> If you think the new SoC specific compatible entry is not necessary, the patch2 also has issue.


Best regards,
Krzysztof