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Subject: Re: [PATCH] clk: qcom: clk-alpha-pll: Use determine_rate instead of round_rate
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     quic_srichara@quicinc.com, quic_sjaganat@quicinc.com,
        quic_kathirav@quicinc.com, quic_anusha@quicinc.com,
        quic_saahtoma@quicinc.com
To:     Devi Priya <quic_devipriy@quicinc.com>, agross@kernel.org,
        andersson@kernel.org, konrad.dybcio@linaro.org,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, mturquette@baylibre.com
Date:   Wed, 19 Jul 2023 13:04:48 -0700
User-Agent: alot/0.10
Precedence: bulk

Quoting Devi Priya (2023-07-10 02:32:06)
> @@ -1094,25 +1099,25 @@ static const struct clk_div_table clk_alpha_2bit_=
div_table[] =3D {
>         { }
>  };
> =20
> -static long
> -clk_alpha_pll_postdiv_round_rate(struct clk_hw *hw, unsigned long rate,
> -                                unsigned long *prate)
> +static int clk_alpha_pll_postdiv_determine_rate(struct clk_hw *hw,
> +                                               struct clk_rate_request *=
req)
>  {
>         struct clk_alpha_pll_postdiv *pll =3D to_clk_alpha_pll_postdiv(hw=
);
>         const struct clk_div_table *table;
> +       unsigned long rate =3D req->rate;
> =20
>         if (pll->width =3D=3D 2)
>                 table =3D clk_alpha_2bit_div_table;
>         else
>                 table =3D clk_alpha_div_table;
> =20
> -       return divider_round_rate(hw, rate, prate, table,
> -                                 pll->width, CLK_DIVIDER_POWER_OF_TWO);
> +       req->rate =3D divider_round_rate(hw, rate, &req->best_parent_rate=
, table,

Can you use divider_determine_rate() instead?

> +                                      pll->width, CLK_DIVIDER_POWER_OF_T=
WO);
> +       return 0;
>  }
> =20
> -static long
> -clk_alpha_pll_postdiv_round_ro_rate(struct clk_hw *hw, unsigned long rat=
e,
> -                                   unsigned long *prate)
> +static int clk_alpha_pll_postdiv_determine_ro_rate(struct clk_hw *hw,
> +                                                  struct clk_rate_reques=
t *req)
>  {
>         struct clk_alpha_pll_postdiv *pll =3D to_clk_alpha_pll_postdiv(hw=
);
>         u32 ctl, div;
[...]
> @@ -1452,14 +1459,16 @@ clk_trion_pll_postdiv_recalc_rate(struct clk_hw *=
hw, unsigned long parent_rate)
>         return (parent_rate / div);
>  }
> =20
> -static long
> -clk_trion_pll_postdiv_round_rate(struct clk_hw *hw, unsigned long rate,
> -                                unsigned long *prate)
> +static int
> +clk_trion_pll_postdiv_determine_rate(struct clk_hw *hw,
> +                                    struct clk_rate_request *req)
>  {
>         struct clk_alpha_pll_postdiv *pll =3D to_clk_alpha_pll_postdiv(hw=
);
> =20
> -       return divider_round_rate(hw, rate, prate, pll->post_div_table,
> -                                 pll->width, CLK_DIVIDER_ROUND_CLOSEST);
> +       req->rate =3D divider_round_rate(hw, req->rate, &req->best_parent=
_rate,

divider_determine_rate()?

> +                                      pll->post_div_table, pll->width,
> +                                      CLK_DIVIDER_ROUND_CLOSEST);
> +       return 0;
>  };
> =20
>  static int
> @@ -1485,18 +1494,21 @@ clk_trion_pll_postdiv_set_rate(struct clk_hw *hw,=
 unsigned long rate,
> =20
>  const struct clk_ops clk_alpha_pll_postdiv_trion_ops =3D {
>         .recalc_rate =3D clk_trion_pll_postdiv_recalc_rate,
> -       .round_rate =3D clk_trion_pll_postdiv_round_rate,
> +       .determine_rate =3D clk_trion_pll_postdiv_determine_rate,
>         .set_rate =3D clk_trion_pll_postdiv_set_rate,
>  };
>  EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_trion_ops);
> =20
> -static long clk_alpha_pll_postdiv_fabia_round_rate(struct clk_hw *hw,
> -                               unsigned long rate, unsigned long *prate)
> +static int
> +clk_alpha_pll_postdiv_fabia_determine_rate(struct clk_hw *hw,
> +                                          struct clk_rate_request *req)
>  {
>         struct clk_alpha_pll_postdiv *pll =3D to_clk_alpha_pll_postdiv(hw=
);
> =20
> -       return divider_round_rate(hw, rate, prate, pll->post_div_table,
> -                               pll->width, CLK_DIVIDER_ROUND_CLOSEST);
> +       req->rate =3D divider_round_rate(hw, req->rate, &req->best_parent=
_rate,
> +                                      pll->post_div_table, pll->width,
> +                                       CLK_DIVIDER_ROUND_CLOSEST);

divider_determine_rate()?