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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a13-20020a1709065f8d00b0099263f8cdc4si3366590eju.207.2023.07.19.15.40.19; Wed, 19 Jul 2023 15:40:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=LRwSja7i; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230464AbjGSWN3 (ORCPT + 99 others); Wed, 19 Jul 2023 18:13:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230128AbjGSWNZ (ORCPT ); Wed, 19 Jul 2023 18:13:25 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99A4F1FED; Wed, 19 Jul 2023 15:13:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 34E6661840; Wed, 19 Jul 2023 22:13:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C9479C433C8; Wed, 19 Jul 2023 22:13:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1689804803; bh=9mhog5cEC4jCgLXESNkH8Vrr7nDt6CeB9bPN18iRiNI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LRwSja7i1CQgKB9XQYh+QyWUoWstQ49qNtCB9iXIuGgoS3XxJhCxpva2LrPrMRiU5 uBqo2Phhs6Ly5amnSUfJv2cjMtIntJKUQVB9WCPpiGsDq1hdt15j2rXjEM/di8STuB 4AtPTy/KV5sl0MQum3efWRfASssJaHvMhpgvJPeHtrz5qkcd8apV+QBzR836rgBlSC u6L2ldh9KuUaKN0vMQm3Xxg8AI+m783g74RRZaTid3wPQ2wZC6gXnK67Z6i55Yxd0J jeMFWnTh8SW7K4bS1UNuiiVnvn3u9+2OZnpUTpTGaxrc8fNIR8IRySaNR5iDGGu0QC N64XRlwBI/mGg== Received: (nullmailer pid 870826 invoked by uid 1000); Wed, 19 Jul 2023 22:13:20 -0000 Date: Wed, 19 Jul 2023 16:13:20 -0600 From: Rob Herring To: Daniel Golle Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Krzysztof Kozlowski , Conor Dooley , Felix Fietkau , John Crispin , Sean Wang , Mark Lee , Lorenzo Bianconi , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , Florian Fainelli , Greg Ungerer , =?iso-8859-1?Q?Bj=F8rn?= Mork , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH net-next v3 2/9] dt-bindings: net: mediatek,net: add mt7988-eth binding Message-ID: <20230719221320.GA865753-robh@kernel.org> References: <584b459ebb0a74a2ce6ca661f1148f59b9014667.1689714291.git.daniel@makrotopia.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <584b459ebb0a74a2ce6ca661f1148f59b9014667.1689714291.git.daniel@makrotopia.org> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 18, 2023 at 10:30:33PM +0100, Daniel Golle wrote: > Introduce DT bindings for the MT7988 SoC to mediatek,net.yaml. > The MT7988 SoC got 3 Ethernet MACs operating at a maximum of > 10 Gigabit/sec supported by 2 packet processor engines for > offloading tasks. > The first MAC is hard-wired to a built-in switch which exposes > four 1000Base-T PHYs as user ports. > It also comes with built-in 2500Base-T PHY which can be used > with the 2nd GMAC. > The 2nd and 3rd GMAC can be connected to external PHYs or provide > SFP(+) cages attached via SGMII, 1000Base-X, 2500Base-X, USXGMII, > 5GBase-KR or 10GBase-KR. > > Signed-off-by: Daniel Golle > --- > .../devicetree/bindings/net/mediatek,net.yaml | 74 +++++++++++++++++-- > 1 file changed, 69 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml > index 38aa3d97ee234..ae2062f3c1833 100644 > --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml > +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml > @@ -24,6 +24,7 @@ properties: > - mediatek,mt7629-eth > - mediatek,mt7981-eth > - mediatek,mt7986-eth > + - mediatek,mt7988-eth > - ralink,rt5350-eth > > reg: > @@ -61,6 +62,12 @@ properties: > Phandle to the mediatek hifsys controller used to provide various clocks > and reset to the system. > > + mediatek,infracfg: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to the syscon node that handles the path from GMAC to > + PHY variants. > + > mediatek,sgmiisys: > $ref: /schemas/types.yaml#/definitions/phandle-array > minItems: 1 > @@ -229,11 +236,7 @@ allOf: > - const: sgmii_ck > - const: eth2pll > > - mediatek,infracfg: > - $ref: /schemas/types.yaml#/definitions/phandle > - description: > - Phandle to the syscon node that handles the path from GMAC to > - PHY variants. > + mediatek,infracfg: true You don't need this. What you need is 'mediatek,infracfg: false' in the if/then schemas for the cases it should not be present. Rob