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Date:   Thu, 20 Jul 2023 10:53:03 +0530
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Subject: Re: [PATCH 6/6] perf vendor events amd: Add Zen 4 memory controller
 events
To:     Ian Rogers <irogers@google.com>
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From:   Sandipan Das <sandipan.das@amd.com>
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 =?utf-8?B?TGVzRk45UEgzWUkzcVo5VFJycjRZYUFicTNPQkJpU0ZWWkI2Z3lwTGhxeW1X?=
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 =?utf-8?B?Q0o4cTd1Sk9rYlVJZzFDNXhVb0lEQVdIc2RSUU1aT21KQkdWNEZWbkN6bFha?=
 =?utf-8?B?YS9nc0YyMmFHM2NPbVp0VllsekNBUTFrNnF4ZnhCM3J1L09VcGtPL2taQ3JV?=
 =?utf-8?B?QUZZWHl5RFo3VWpkM1lrWGh0YkF1RkZhT2hhaEtkVjNpNHU5Wmx0UVVuWjM4?=
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 =?utf-8?B?eEFNOTlkdWNBQVBMQ2tpV1oyemJ0NitaZmNBTmlKdnhoZm9VQ0VQZHVOa1RF?=
 =?utf-8?B?ZFpvOTJySVJyNitaMi9tYlVkK1dHYkM1VmN1VlArdWVQam1sT0dmTWpNVlJm?=
 =?utf-8?B?Zml2eTJ1VHd4akk4SUlxckNTcUFvNFZDVHVEaWpxMU1rTzhGWDErb0ZkR016?=
 =?utf-8?B?NDJ5UStpK2VnYTZ3YkZMUkQyNXNJRmdRQTBXSUhrMERTQ3NLT0wvbFRxY1ZL?=
 =?utf-8?B?S1I3WUQ2Qjg2ZG5ZV2hwS3hSNFYwSDBJZkdqelRZQytGZ3RyNEZuaFBBcy9Z?=
 =?utf-8?B?SGhqR0JvU2hlNVBXU0hvWC81WW9UODlzdmR3YS9naXg2UmdPMC9ybFBGRE5H?=
 =?utf-8?B?aUNaOEdSZlJNZ2N0ZnMrWHRqem54ODZpS2dvZDlTNFo3YWJ0cGdPUzFiRE9O?=
 =?utf-8?B?NU9NRVYrMlF0QlhRZjhGNWJXbEVCWVZDa2IveGM5Y1ZuUTU0dXRTMlQ2cE9K?=
 =?utf-8?B?SnpvaTZVUmVqUS91QzlKWXo0dzV0RjFHZDR4ajI3c0Q0bEU1emwydGw2TzlQ?=
 =?utf-8?B?U0t2bEVNRk9aNkJwL0xmQmdsTUswVSt5L2hhREwvVnE5SXJCaXhzM2MyL1Zi?=
 =?utf-8?B?NWdkR2N6SnAxY1VqM3o0a3hqZ2ZrempqWXJlSmNQNHBZUG10SElxeEJZTHA3?=
 =?utf-8?B?YkdWZFJDV3ZuclR4R2JRS2NiNkpUTktRNVhWOFY2amxEeWZORkFkd2JPajBP?=
 =?utf-8?B?M0lEdzVWczQ3VmJJNGFZQjl2b1FJU3dIc0FlQXp1SGNZeDljdE10YWxlV3k5?=
 =?utf-8?B?OE1tZk1LbnN1R2lOUVc5VFpBWkZyOU1iQjVMY29JY2VlbS8rRTNIS09xNUpE?=
 =?utf-8?B?aWtDNWp1S0ZIV3hPY2ZyQjllRnhBRDk1TENsdTV6c1dlWHNCVGNMV3lhcEp1?=
 =?utf-8?B?dFJQSGE2c202Zk80V3NPSWVyUEJOUVdvWHpkZEFaNkl1T1NrZ3V6ay9BWmJ6?=
 =?utf-8?B?K2tqcHRQWkJkTG1CREtzbFl1U09OZEJPZGh2V1dnaWMvSncydi9kNWRMSDBo?=
 =?utf-8?B?L1lJV2ExWElvRzBua3dxQ3BzRzY0LzQ5Z2ZJdjN6M2lYVlBNY3BYcXhodXY1?=
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On 7/19/2023 9:42 PM, Ian Rogers wrote:
> On Tue, Jul 18, 2023 at 11:58 PM Sandipan Das <sandipan.das@amd.com> wrote:
>>
>> Make the jevents parser aware of the Unified Memory Controller (UMC) PMU
>> and add events taken from Section 8.2.1 "UMC Performance Monitor Events"
>> of the Processor Programming Reference (PPR) for AMD Family 19h Model 11h
>> processors. The events capture UMC command activity such as CAS, ACTIVATE,
>> PRECHARGE etc. while the metrics derive data bus utilization and memory
>> bandwidth out of these events.
>>
>> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
> 
> Acked-by: Ian Rogers <irogers@google.com>
> 
>> ---
>>  .../arch/x86/amdzen4/memory-controller.json   | 101 ++++++++++++++++++
>>  .../arch/x86/amdzen4/recommended.json         |  84 +++++++++++++++
>>  tools/perf/pmu-events/jevents.py              |   2 +
>>  3 files changed, 187 insertions(+)
>>  create mode 100644 tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json
>>
>> diff --git a/tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json b/tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json
>> new file mode 100644
>> index 000000000000..55263e5e4f69
>> --- /dev/null
>> +++ b/tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json
>> @@ -0,0 +1,101 @@
>> +[
>> +  {
>> +    "EventName": "umc_mem_clk",
>> +    "PublicDescription": "Number of memory clock cycles.",
>> +    "EventCode": "0x00",
>> +    "PerPkg": "1",
>> +    "Unit": "UMCPMC"
> 
> nit: Why use UMCPMC and then rewrite to amd_umc, why not just use "amd_umc" ?
> 

I followed the convention that has been historically used for AMD uncore PMUs e.g.
the "Unit" for amd_df is "DFPMC" and for amd_l3 is "L3PMC". I do agree that its
simpler to use the same naming so will change this. If you prefer, I can send out
a separate patch to change the unit naming for amd_df and amd_l3.

- Sandipan