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From:   Conor Dooley <conor@kernel.org>
To:     Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Hal Feng <hal.feng@starfivetech.com>,
        linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        Xingyu Wu <xingyu.wu@starfivetech.com>
Cc:     Conor Dooley <conor.dooley@microchip.com>,
        linux-kernel@vger.kernel.org,
        William Qiu <william.qiu@starfivetech.com>,
        linux-clk@vger.kernel.org
Subject: Re: (subset) [PATCH v7 0/7] Add PLL clocks driver and syscon for StarFive JH7110 SoC
Date:   Thu, 20 Jul 2023 17:29:50 +0100
Message-Id: <20230720-deck-accent-0dffdaf52958@spud>
In-Reply-To: <20230717023040.78860-1-xingyu.wu@starfivetech.com>
References: <20230717023040.78860-1-xingyu.wu@starfivetech.com>
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From: Conor Dooley <conor.dooley@microchip.com>

On Mon, 17 Jul 2023 10:30:33 +0800, Xingyu Wu wrote:
> This patch serises are to add PLL clocks driver and providers by writing
> and reading syscon registers for the StarFive JH7110 RISC-V SoC. And add
> documentation and nodes to describe StarFive System Controller(syscon)
> Registers. This patch serises are based on Linux 6.4.
> 
> PLLs are high speed, low jitter frequency synthesizers in JH7110.
> Each PLL clock works in integer mode or fraction mode by some dividers,
> and the dividers are set in several syscon registers.
> The formula for calculating frequency is:
> Fvco = Fref * (NI + NF) / M / Q1
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[6/7] riscv: dts: starfive: jh7110: Add syscon nodes
      https://git.kernel.org/conor/c/3fcbcfc496f0
[7/7] riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node
      https://git.kernel.org/conor/c/3e6670a28b00

Thanks,
Conor.