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Received: from MN0PR12MB5713.namprd12.prod.outlook.com (2603:10b6:208:370::18) by CY5PR12MB6034.namprd12.prod.outlook.com (2603:10b6:930:2e::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6609.24; Fri, 21 Jul 2023 05:15:27 +0000 Received: from MN0PR12MB5713.namprd12.prod.outlook.com ([fe80::8ba3:7aea:769f:718f]) by MN0PR12MB5713.namprd12.prod.outlook.com ([fe80::8ba3:7aea:769f:718f%7]) with mapi id 15.20.6609.026; Fri, 21 Jul 2023 05:15:27 +0000 Message-ID: <19be0aea-30b2-2aa2-12d7-57f668d759cb@amd.com> Date: Fri, 21 Jul 2023 10:45:09 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/6] perf vendor events amd: Add Zen 4 memory controller events To: Ian Rogers Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, x86@kernel.org, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, adrian.hunter@intel.com, tglx@linutronix.de, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, eranian@google.com, ananth.narayan@amd.com, ravi.bangoria@amd.com, santosh.shukla@amd.com References: Content-Language: en-US From: Sandipan Das In-Reply-To: Content-Type: text/plain; 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The events capture UMC command activity such as CAS, ACTIVATE, >>>> PRECHARGE etc. while the metrics derive data bus utilization and memory >>>> bandwidth out of these events. >>>> >>>> Signed-off-by: Sandipan Das >>> >>> Acked-by: Ian Rogers >>> >>>> --- >>>> .../arch/x86/amdzen4/memory-controller.json | 101 ++++++++++++++++++ >>>> .../arch/x86/amdzen4/recommended.json | 84 +++++++++++++++ >>>> tools/perf/pmu-events/jevents.py | 2 + >>>> 3 files changed, 187 insertions(+) >>>> create mode 100644 tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json >>>> >>>> diff --git a/tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json b/tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json >>>> new file mode 100644 >>>> index 000000000000..55263e5e4f69 >>>> --- /dev/null >>>> +++ b/tools/perf/pmu-events/arch/x86/amdzen4/memory-controller.json >>>> @@ -0,0 +1,101 @@ >>>> +[ >>>> + { >>>> + "EventName": "umc_mem_clk", >>>> + "PublicDescription": "Number of memory clock cycles.", >>>> + "EventCode": "0x00", >>>> + "PerPkg": "1", >>>> + "Unit": "UMCPMC" >>> >>> nit: Why use UMCPMC and then rewrite to amd_umc, why not just use "amd_umc" ? >>> >> >> I followed the convention that has been historically used for AMD uncore PMUs e.g. >> the "Unit" for amd_df is "DFPMC" and for amd_l3 is "L3PMC". I do agree that its >> simpler to use the same naming so will change this. If you prefer, I can send out >> a separate patch to change the unit naming for amd_df and amd_l3. > > Thanks for the explanation. I don't mind but it is nicer to have fewer > renames imo. If we get rid of one, perhaps we can get rid of them all? > Perhaps merge this and follow up with simplification. > Sure, sounds good. - Sandipan