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Message-ID: <884ed5d5-8863-ac76-5f00-4ed58480e9ab@linaro.org>
Date:   Fri, 21 Jul 2023 10:53:58 +0200
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Subject: Re: [v2 PATCH] arm64: dts: stratix10: add new compatible for Intel
 SoCFPGA Stratix10 platform
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From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To:     Meng Li <Meng.Li@windriver.com>, dinguyen@kernel.org,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        conor+dt@kernel.org, devicetree@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org
References: <20230721083821.1820881-1-Meng.Li@windriver.com>
 <b8333812-df9d-368a-939b-3495878a2e5e@linaro.org>
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On 21/07/2023 10:51, Krzysztof Kozlowski wrote:
> On 21/07/2023 10:38, Meng Li wrote:
>> Intel Stratix10 is very the same with Agilex platform, the DWC2 IP on
>> the Stratix platform also does not support clock-gating. The commit
>> 3d8d3504d233("usb: dwc2: Add platform specific data for Intel's Agilex")
>> had fixed this issue. So, add the essential compatible to also use the
>> specific data on Stratix10 platform.
>>
>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> From where did you get it?
> 
> Did you just fake a tag to pass the review?

I just double checked my replies and this for sure never happened.

NAK, don't fake reviews. This very impolite and destroys entire trust.
The model of upstream collaboration depends on the trust, which is now
gone for Windriver.

Best regards,
Krzysztof