Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Ali Saidi <alisaidi@amazon.com>
To:     <leo.yan@linaro.org>
CC:     <acme@kernel.org>, <catalin.marinas@arm.com>, <will@kernel.org>,
        <john.g.garry@oracle.com>, <james.clark@arm.com>,
        <mike.leach@linaro.org>, <peterz@infradead.org>,
        <mingo@redhat.com>, <mark.rutland@arm.com>,
        <alexander.shishkin@linux.intel.com>, <jolsa@kernel.org>,
        <namhyung@kernel.org>, <irogers@google.com>,
        <adrian.hunter@intel.com>, <scott@os.amperecomputing.com>,
        <maz@kernel.org>, <anshuman.khandual@arm.com>,
        <german.gomez@arm.com>, <alisaidi@amazon.com>,
        <renyu.zj@linux.alibaba.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <linux-perf-users@vger.kernel.org>,
        <fissure2010@gmail.com>
Subject: Re: [PATCH v1 0/3] arm64: Support Cortex-X4 CPU for Perf Arm SPE
Date:   Fri, 21 Jul 2023 18:16:53 +0000
Message-ID: <20230721181653.22398-1-alisaidi@amazon.com>
In-Reply-To: <20230717054327.79815-1-leo.yan@linaro.org>
References: <20230717054327.79815-1-leo.yan@linaro.org>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
Precedence: bulk

Hi Leo,

On Mon, 17 Jul 2023 05:43:24 +0000, Leo Yan wrote:
> This series support Cortex-X4 CPU in Perf Arm SPE.
> 
> The Arm64 and tools both include the header cputype.h for CPU part and
> MIDR definitions, to de-couple between the tools and the kernel, the
> tools doesn't directly use the kernel's header, alternatively, the tools
> maintain a copy and sync with kernel's header.
> 
> To keep the exact same content between kernel and tools' headers, this
> series firstly adds Cortex-X4 CPU part and MIDR definitions in the
> kernel header; then the second patch syncs the change into the tools'
> header.  The first patch is to support the Cortex-X4 in perf Arm SPE
> with the new CPU definitions.
> 
> I don't have Cortex-X4 machine in hand, so just verified with
> compilation perf tool.

This looks good to me, but can we add the other cores that operate the
same way now too? Flipping through the TRMs A78, X3, V2, X1, A715,
A720, and A78C all have the same encodings. 

Reviewed-by: Ali Saidi <alisaidi@amazon.com>

Thanks!
Ali