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Date:   Sat, 22 Jul 2023 20:59:46 +0100
From:   Simon Horman <simon.horman@corigine.com>
To:     Suman Ghosh <sumang@marvell.com>
Cc:     sgoutham@marvell.com, gakula@marvell.com, sbhatta@marvell.com,
        hkelam@marvell.com, davem@davemloft.net, edumazet@google.com,
        kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, lcherian@marvell.com,
        jerinj@marvell.com
Subject: Re: [net PATCH V4] octeontx2-af: Fix hash extraction enable
 configuration
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References: <20230721061222.2632521-1-sumang@marvell.com>
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On Fri, Jul 21, 2023 at 11:42:22AM +0530, Suman Ghosh wrote:
> As of today, hash extraction support is enabled for all the silicons.
> Because of which we are facing initialization issues when the silicon
> does not support hash extraction. During creation of the hardware
> parsing table for IPv6 address, we need to consider if hash extraction
> is enabled then extract only 32 bit, otherwise 128 bit needs to be
> extracted. This patch fixes the issue and configures the hardware parser
> based on the availability of the feature.
> 
> Fixes: a95ab93550d3 ("octeontx2-af: Use hashed field in MCAM key")
> Signed-off-by: Suman Ghosh <sumang@marvell.com>

Reviewed-by: Simon Horman <simon.horman@corigine.com>