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Date:   Sun, 23 Jul 2023 12:37:38 +0200
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Subject: Re: [PATCH v3 4/4] arm64: dts: freescale: Add support for LX2162 SoM
 & Clearfog Board
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To:     Shawn Guo <shawnguo@kernel.org>
Cc:     devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Li Yang <leoyang.li@nxp.com>
References: <20230619090026.22713-1-josua@solid-run.com>
 <20230619090026.22713-5-josua@solid-run.com> <20230718024607.GY9559@dragon>
From:   Josua Mayer <josua@solid-run.com>
In-Reply-To: <20230718024607.GY9559@dragon>
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Hi Shawn,

Thank you for reviewing.

Note I have added a general question inline below.

Am 18.07.23 um 04:46 schrieb Shawn Guo:
> On Mon, Jun 19, 2023 at 12:00:26PM +0300, Josua Mayer wrote:
>> Add support for the SolidRun LX2162A System on Module (SoM), and the
>> Clearfog evaluation board.

>> +&dpmac11 {
>> +	status = "okay";
> We generally end property list with 'status'.
Okay, I will change the order for v4.
>
> Shawn
>
>> +	phys = <&serdes_2 0>;
>> +	phy-handle = <&ethernet_phy2>;
>> +	phy-connection-type = "sgmii";
>> +};
>> +
>> +&emdio1 {
>> +	/*
>> +	 * SoM has a phy at address 1 connected to SoC Ethernet Controller 1.
>> +	 * It competes for WRIOP MAC17, and no connector has been wired.
>> +	 */
>> +	/delete-node/ ethernet-phy@1;
Perhaps somebody can help here on what is best practice:
As outlined in the comment the SoM includes an ethernet phy at address 
1, which is not used at all by the Clearfog carrier.

What is the best practice for unused but available components?

The phy can still communicate on mdio - just it will never receive rgmii 
signals from ether cpu or carrier.
I am leaning towards just keeping it with status okay, if only for the 
prospect that a smart driver might put it in a power-saving mode.

>> +
>> +	ethernet_phy0: ethernet-phy@8 {
>> +		compatible = "ethernet-phy-ieee802.3-c45";
>> +		reg = <8>;
>> +		max-speed = <1000>;
>> +	};
>> +


- Josua Mayer