Received: by 2002:a05:6358:701b:b0:131:369:b2a3 with SMTP id 27csp3143896rwo; Mon, 24 Jul 2023 06:59:25 -0700 (PDT) X-Google-Smtp-Source: APBJJlF35G3griN452ZEfSIYHWqnFMVIs5ehmJ4MkpiJnxcuStK18uJJ4W5ouTMMxjM2mwFg8Ukd X-Received: by 2002:a05:651c:c5:b0:2b8:4026:1f54 with SMTP id 5-20020a05651c00c500b002b840261f54mr5744876ljr.49.1690207164673; Mon, 24 Jul 2023 06:59:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690207164; cv=none; d=google.com; s=arc-20160816; b=XTpgJaJWwzL/qoQNAmiUT/oCBfF+pGqbb/+Am6BPm/tXKGFaskhIRu6hADTbTCHSct /5RbRGlNLgUQI07ZJ6HpajEApY72M2aWt8u7IdDF1WBlKF2qgg37Oo4h8LeJ+vbhNVtt JFA/ZjjvIe2DQUMxA0ilR6CCTIETUnL45xaec827yksRwEKRLRPeBKzEVlt3/i69veNM jvK1QPSDqyDr82ZpwD2oeZR4kAshUYJWkFv3fOX6GUVunMXh0DrVjRQxnIUUVClKNLnM utkQ8/LqftQeeZu+57MOVsNgCMPC9GxSJGd2RyaqF3BnBTTUKqoupeCtzPH8rECaGgV9 H6Kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=mUWQg0Daa99Sqhp/0FPccvqi1H7Uyq4ON7eG8GCOdDU=; fh=87NVsJ14TvW6eGTHbHxsF/xEOJ7UDUEZI8AGvzJDM6g=; b=zdNxcaoJvpWGwvSTapdkM2glRTRK9j1pqs1x86pSW8CsB4MazEc0FZnWY0osQ5NrYl GKVskl4XzqtplXfigXGAM0TBOgCTdu5iw5KrU49ELCa+2/QC1+59oFrFQlbL/37WpQli eeyEDjyZIp7H62+5zZz8NrPmKpwPteSYKVToBpI9tvhfagFnWcZE7zI4dlh473M4Sew0 gsICGqNmT26e8nsPWs97OiROSea39kec02+nYl+zdoSEEeSVyQSGaP85uC8cnnpO6TWN 2h9QjyyiEhGa7c2/bP5VY8EwZHrrG8u0A6obMJXb67yr+NIykbUJj7CrQatDb467tamF uzqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q16-20020a17090622d000b0098959daa36esi6283790eja.1022.2023.07.24.06.59.00; Mon, 24 Jul 2023 06:59:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230511AbjGXNpc (ORCPT + 99 others); Mon, 24 Jul 2023 09:45:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231614AbjGXNpT (ORCPT ); Mon, 24 Jul 2023 09:45:19 -0400 Received: from mail11.truemail.it (mail11.truemail.it [IPv6:2001:4b7e:0:8::81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28F0C3A84; Mon, 24 Jul 2023 06:43:11 -0700 (PDT) Received: from francesco-nb.pivistrello.it (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id B6C2F20957; Mon, 24 Jul 2023 15:36:35 +0200 (CEST) From: Francesco Dolcini To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Francesco Dolcini , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Judith Mendez Subject: [PATCH v1 0/2] arm64: dts: ti: k3-am62: Add MCU MCAN Date: Mon, 24 Jul 2023 15:36:10 +0200 Message-Id: <20230724133612.37366-1-francesco@dolcini.it> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Francesco Dolcini On AM62x there are no hardware interrupts routed to A53 GIC interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were omitted from MCU dtsi. Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes to the MCU dtsi for Cortex A53. [1] b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt") [2] bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN") Once the MCU MCANs are added to the SOC dtsi, enable the Verdin CAN2. Hiago De Franco (1): arm64: dts: ti: k3-am625-verdin: enable CAN_2 Judith Mendez (1): arm64: dts: ti: k3-am62: Add MCU MCAN nodes arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 +++++++++++++++++++ .../boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 5 ++++ .../arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi | 5 ++++ .../boot/dts/ti/k3-am62-verdin-yavia.dtsi | 5 ++++ arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 19 +++++++++++++-- 5 files changed, 56 insertions(+), 2 deletions(-) -- 2.25.1