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[2620:137:e000::1:20]) by mx.google.com with ESMTP id l19-20020a639853000000b005533647f7c5si10292277pgo.420.2023.07.24.17.30.51; Mon, 24 Jul 2023 17:31:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=hYKW6XU9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231160AbjGXWUj (ORCPT + 99 others); Mon, 24 Jul 2023 18:20:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229746AbjGXWUi (ORCPT ); Mon, 24 Jul 2023 18:20:38 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 077CA10D for ; Mon, 24 Jul 2023 15:20:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690237236; x=1721773236; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=SCKi6jOraft0OKPsKpSO33aCghlGgDaOistskMslVOQ=; b=hYKW6XU99wp3M7N3+E/txmLB2N5gXwn0l66+iDRaBqz/oHe1W4SISENl SueiU9Sqv4BJ2K6OMSkU7foV0tmSDSY59gkvJRVb85GlWwr4v+00li1US hfChrbF0mGvGJTRhZsu4wG5ZdhkAejLCS93ayf+brKG1/y6/xNe/N/YHy vA0ujtplOKePUMQh08befSaRgffcDWODbftxURRNP+UfqKRMck7ABVhdr oBTc2VooMJlujAoG3ZcWZOA7KE7eS5fvpDr3EuPYge/t+P7RLnLfScjRG rDflcLinAAY2ahNfJv6blTOTOYgJdMMXp+QBMAq2yTbV6rpQN4SsPeTJY g==; X-IronPort-AV: E=McAfee;i="6600,9927,10781"; a="398476676" X-IronPort-AV: E=Sophos;i="6.01,229,1684825200"; d="scan'208";a="398476676" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2023 15:20:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10781"; a="899675490" X-IronPort-AV: E=Sophos;i="6.01,229,1684825200"; d="scan'208";a="899675490" Received: from srinivas-otcpl-7600.jf.intel.com (HELO jacob-builder.jf.intel.com) ([10.54.97.184]) by orsmga005.jf.intel.com with ESMTP; 24 Jul 2023 15:20:36 -0700 From: Jacob Pan To: LKML , iommu@lists.linux.dev, "Lu Baolu" , Joerg Roedel , Jean-Philippe Brucker , "Robin Murphy" Cc: Jason Gunthorpe , "Will Deacon" , "Tian, Kevin" , Yi Liu , "Yu, Fenghua" , Tony Luck , Jacob Pan Subject: [PATCH v11 0/8] Re-enable IDXD kernel workqueue under DMA API Date: Mon, 24 Jul 2023 15:25:30 -0700 Message-Id: <20230724222538.3902553-1-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.3 required=5.0 tests=AC_FROM_MANY_DOTS,BAYES_00, DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Joerg and all, IDXD kernel work queues were disabled due to the flawed use of kernel VA and SVA API. Link: https://lore.kernel.org/linux-iommu/20210511194726.GP1002214@nvidia.com/ The solution is to enable it under DMA API where IDXD shared workqueue users can use ENQCMDS to submit work on buffers mapped by DMA API. This patchset adds support for attaching PASID to the device's default domain and the ability to allocate global PASIDs from IOMMU APIs. IDXD driver can then re-enable the kernel work queues and use them under DMA API. This depends on the IOASID removal series. (merged) https://lore.kernel.org/all/ZCaUBJvUMsJyD7EW@8bytes.org/ Thanks, Jacob --- Changelog: v11: - Rebased onto Joerg's next tree (v6.5-rc1) - Split RIDPASID check in invalidation code into patch (6/8) - Renamed iommu_alloc_global_pasid_dev to iommu_alloc_global_pasid (2/8) - Added WARN_ON if no dev_pasid is found during remove (7/8) v10: - Fix global PASID alloc function with device's max_pasid=0 v9: - Fix an IDXD driver issue where user interrupt enable bit got cleared during device enable/disable cycle. Reported and tested by Tony Zhu - Rebased to v6.4-rc7 v8: - further vt-d driver refactoring (3-6) around set/remove device PASID (Baolu) - make consistent use of NO_PASID in SMMU code (Jean) - fix off-by-one error in max PASID check (Kevin) v7: - renamed IOMMU_DEF_RID_PASID to be IOMMU_NO_PASID to be more generic (Jean) - simplify range checking for sva PASID (Baolu) v6: - use a simplified version of vt-d driver change for set_device_pasid from Baolu. - check and rename global PASID allocation base v5: - exclude two patches related to supervisor mode, taken by VT-d maintainer Baolu. - move PASID range check into allocation API so that device drivers only need to pass in struct device*. (Kevin) - factor out helper functions in device-domain attach (Baolu) - make explicit use of RID_PASID across architectures v4: - move dummy functions outside ifdef CONFIG_IOMMU_SVA (Baolu) - dropped domain type check while disabling idxd system PASID (Baolu) v3: - moved global PASID allocation API from SVA to IOMMU (Kevin) - remove #ifdef around global PASID reservation during boot (Baolu) - remove restriction on PASID 0 allocation (Baolu) - fix a bug in sysfs domain change when attaching devices - clear idxd user interrupt enable bit after disabling device( Fenghua) v2: - refactored device PASID attach domain ops based on Baolu's early patch - addressed TLB flush gap - explicitly reserve RID_PASID from SVA PASID number space - get dma domain directly, avoid checking domain types Jacob Pan (3): iommu: Generalize PASID 0 for normal DMA w/o PASID iommu: Move global PASID allocation from SVA to core dmaengine/idxd: Re-enable kernel workqueue under DMA API Lu Baolu (5): iommu/vt-d: Add domain_flush_pasid_iotlb() iommu/vt-d: Remove pasid_mutex iommu/vt-d: Make prq draining code generic iommu/vt-d: Prepare for set_dev_pasid callback iommu/vt-d: Add set_dev_pasid callback for dma domain drivers/dma/idxd/device.c | 39 ++--- drivers/dma/idxd/dma.c | 5 +- drivers/dma/idxd/idxd.h | 9 + drivers/dma/idxd/init.c | 54 +++++- drivers/dma/idxd/sysfs.c | 7 - .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 2 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 +- drivers/iommu/intel/iommu.c | 157 +++++++++++++++--- drivers/iommu/intel/iommu.h | 9 + drivers/iommu/intel/pasid.c | 2 +- drivers/iommu/intel/pasid.h | 2 - drivers/iommu/intel/svm.c | 62 +------ drivers/iommu/iommu-sva.c | 29 ++-- drivers/iommu/iommu.c | 28 ++++ include/linux/iommu.h | 11 ++ 15 files changed, 287 insertions(+), 145 deletions(-) -- 2.25.1