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From:   "Luck, Tony" <tony.luck@intel.com>
To:     "Zhuo, Qiuxu" <qiuxu.zhuo@intel.com>
CC:     Borislav Petkov <bp@alien8.de>, Aristeu Rozanski <aris@redhat.com>,
        "Mauro Carvalho Chehab" <mchehab@kernel.org>,
        "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Lim, Ee Wey" <ee.wey.lim@intel.com>
Subject: RE: [PATCH 1/1] EDAC/igen6: Fix the issue of no error events
Thread-Topic: [PATCH 1/1] EDAC/igen6: Fix the issue of no error events
Thread-Index: AQHZvs70AZA+3i1QEU28InVclO7Ajq/KoVGg
Date:   Tue, 25 Jul 2023 15:51:24 +0000
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References: <20230725080427.23883-1-qiuxu.zhuo@intel.com>
In-Reply-To: <20230725080427.23883-1-qiuxu.zhuo@intel.com>
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> Fix this issue by moving the pending error handler after the registration
> of the error handler, ensuring that no pending errors are left unhandled.

Do you think drivers/edac/e7xxx_edac.c has the same issue?

491
492         /* clear any pending errors, or initial state bits */
493         e7xxx_get_error_info(mci, &discard);
494
495         /* Here we assume that we will never see multiple instances of =
this
496          * type of memory controller.  The ID is therefore hardcoded to=
 0.
497          */
498         if (edac_mc_add_mc(mci)) {
499                 edac_dbg(3, "failed edac_mc_add_mc()\n");
500                 goto fail1;
501         }
502
503         /* allocating generic PCI control info */
504         e7xxx_pci =3D edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_=
STR);

Though it might be hard to find such an old system to test.

-Tony