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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a19-20020a056a001d1300b00686bc5cd56fsi571294pfx.29.2023.07.25.16.26.27; Tue, 25 Jul 2023 16:26:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Vwaj8mS7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232807AbjGYWgB (ORCPT + 99 others); Tue, 25 Jul 2023 18:36:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231826AbjGYWfo (ORCPT ); Tue, 25 Jul 2023 18:35:44 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86B7E7EFD; Tue, 25 Jul 2023 15:29:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690324153; x=1721860153; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=iJwptdJ8URixm2JO69W9VJ1O2cZgAeG+0OtQdX6s/p8=; b=Vwaj8mS79PDAV+fsous3h2Zqw/QIzqKJ1NeuKvkOzsDRtIs+sBxKfVcu VX/TdhM0VgIfZFYlf/jDUok3BHubrIqrR9vDDQr9w2JxaNG9xc4TCN5fR Eoqt3uls/iiMkwq1Jqi7pTD8WAv2SHPOpopGq+97aSdCJ4uSpfqgyTeXJ r1C/7fjCkCVwzXldEwpskLVKOCNU4y+zm7QMHFuCOIhorYQ/o5qx63mM5 sWg6NS6H7wPn5vN7oHEnnyM5ipHyyoyU2r2B2beETLna2tPsdXtvDIvw+ M7LB8EhwAlrnLXmNjtYPehXPK7lqG+5y5QMBR3RiKTk6tGVzlrlcqgepg g==; X-IronPort-AV: E=McAfee;i="6600,9927,10782"; a="371467094" X-IronPort-AV: E=Sophos;i="6.01,231,1684825200"; d="scan'208";a="371467094" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2023 15:24:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10782"; a="972855778" X-IronPort-AV: E=Sophos;i="6.01,231,1684825200"; d="scan'208";a="972855778" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2023 15:24:08 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack , Kai Huang , Zhi Wang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [RFC PATCH v4 00/16] KVM TDX: TDP MMU: large page support Date: Tue, 25 Jul 2023 15:23:46 -0700 Message-Id: X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Mailer: git-send-email 2.25.1 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Isaku Yamahata From: Isaku Yamahata Changes from v3: - Rebased to v15 TDX KVM v6.5-rc1 base Changes from v2: - implemented page merging path - rebased to TDX KVM v11 Changes from v1: - implemented page merging path - rebased to UPM v10 - rebased to TDX KVM v10 - rebased to kvm.git queue + v6.1-rc8 --- This patch series is based on "v15 KVM TDX: basic feature support". It implements large page support for TDP MMU by allowing populating of the large page and splitting it when necessary. Feedback for options to merge sub-pages into a large page are welcome. Remaining TODOs =============== * Make nx recovery thread use TDH.MEM.RANGE.BLOCK instead of zapping EPT entry. * Record that the entry is blocked by introducing a bit in spte. On EPT violation, check if the entry is blocked or not. If the EPT violation is caused by a blocked Secure-EPT entry, trigger the page merge logic. Splitting large pages when necessary ==================================== * It already tracking whether GFN is private or shared. When it's changed, update lpage_info to prevent a large page. * TDX provides page level on Secure EPT violation. Pass around the page level that the lower level functions needs. * Even if the page is the large page in the host, at the EPT level, only some sub-pages are mapped. In such cases abandon to map large pages and step into the sub-page level, unlike the conventional EPT. * When zapping spte and the spte is for a large page, split and zap it unlike the conventional EPT because otherwise the protected page contents will be lost. Merging small pages into a large page if possible ================================================= On normal EPT violation, check whether pages can be merged into a large page after mapping it. TDX operation ============= The following describes what TDX operations procedures. * EPT violation trick Such track (zapping the EPT entry to trigger EPT violation) doesn't work for TDX. For TDX, it will lose the contents of the protected page to zap a page because the protected guest page is un-associated from the guest TD. Instead, TDX provides a different way to trigger EPT violation without losing the page contents so that VMM can detect guest TD activity by blocking/unblocking Secure-EPT entry. TDH.MEM.RANGE.BLOCK and TDH.MEM.RANGE.UNBLOCK. They correspond to clearing/setting a present bit in an EPT entry with page contents still kept. By TDH.MEM.RANGE.BLOCK and TLB shoot down, VMM can cause guest TD to trigger EPT violation. After that, VMM can unblock it by TDH.MEM.RANGE.UNBLOCK and resume guest TD execution. The procedure is as follows. - Block Secure-EPT entry by TDH.MEM.RANGE.BLOCK. - TLB shoot down. - Wait for guest TD to trigger EPT violation. - Unblock Secure-EPT entry by TDH.MEM.RANGE.UNBLOCK to resume the guest TD. * merging sub-pages into a large page The following steps are needed. - Ensure that all sub-pages are mapped. - TLB shoot down. - Merge sub-pages into a large page (TDH.MEM.PAGE.PROMOTE). This requires all sub-pages are mapped. - Cache flush Secure EPT page used to map subpages. Thanks, Isaku Yamahata (4): KVM: x86/tdp_mmu: Allocate private page table for large page split KVM: x86/tdp_mmu: Try to merge pages into a large page KVM: x86/tdp_mmu: TDX: Implement merge pages into a large page KVM: x86/mmu: Make kvm fault handler aware of large page of private memslot Xiaoyao Li (12): KVM: TDP_MMU: Go to next level if smaller private mapping exists KVM: TDX: Pass page level to cache flush before TDX SEAMCALL KVM: TDX: Pass KVM page level to tdh_mem_page_add() and tdh_mem_page_aug() KVM: TDX: Pass size to tdx_measure_page() KVM: TDX: Pass size to reclaim_page() KVM: TDX: Update tdx_sept_{set,drop}_private_spte() to support large page KVM: MMU: Introduce level info in PFERR code KVM: TDX: Pin pages via get_page() right before ADD/AUG'ed to TDs KVM: TDX: Pass desired page level in err code for page fault handler KVM: x86/tdp_mmu: Split the large page when zap leaf KVM: x86/tdp_mmu, TDX: Split a large page when 4KB page within it converted to shared KVM: TDX: Allow 2MB large page for TD GUEST arch/x86/include/asm/kvm-x86-ops.h | 3 + arch/x86/include/asm/kvm_host.h | 11 ++ arch/x86/kvm/Kconfig | 1 + arch/x86/kvm/mmu/mmu.c | 40 +++-- arch/x86/kvm/mmu/mmu_internal.h | 35 +++- arch/x86/kvm/mmu/tdp_iter.c | 37 +++- arch/x86/kvm/mmu/tdp_iter.h | 2 + arch/x86/kvm/mmu/tdp_mmu.c | 279 ++++++++++++++++++++++++++--- arch/x86/kvm/vmx/common.h | 6 +- arch/x86/kvm/vmx/tdx.c | 227 +++++++++++++++++------ arch/x86/kvm/vmx/tdx_arch.h | 21 +++ arch/x86/kvm/vmx/tdx_errno.h | 2 + arch/x86/kvm/vmx/tdx_ops.h | 50 ++++-- arch/x86/kvm/vmx/vmx.c | 2 +- 14 files changed, 601 insertions(+), 115 deletions(-) base-commit: bfa3037d828050896ae52f6467b6ca2489ae6fb1 prerequisite-patch-id: 3bd3037b3803e2d84f0ef98bb6c678be44eddd08 prerequisite-patch-id: b474cbf4f0ea21cf945036271f5286017e0efc84 prerequisite-patch-id: bd96a89fafe51956a55fdfc08a3ea2a37a2e55e4 prerequisite-patch-id: f15d178f9000430e0089c546756ab1d8d29341a7 prerequisite-patch-id: 5b34829d7433fa81ed574d724ee476b9cc2e6a50 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