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From:   Pankaj Gupta <pankaj.gupta@nxp.com>
To:     Conor Dooley <conor.dooley@microchip.com>
CC:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
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Subject: RE: [EXT] Re: [PATCH v4 1/7] dt-bindings: arm: fsl: add se-fw binding
 doc
Thread-Topic: [EXT] Re: [PATCH v4 1/7] dt-bindings: arm: fsl: add se-fw
 binding doc
Thread-Index: AQHZtLo09zXvz2nwA0eXBXtTWXN23a+2c2IAgAACQoCAEfalcIAAH9IAgAAAzEA=
Date:   Thu, 27 Jul 2023 09:20:27 +0000
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> -----Original Message-----
> From: Conor Dooley <conor.dooley@microchip.com>
> Sent: Monday, July 24, 2023 12:18 PM
> To: Pankaj Gupta <pankaj.gupta@nxp.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>; Conor Dooley
> <conor@kernel.org>; shawnguo@kernel.org; s.hauer@pengutronix.de;
> kernel@pengutronix.de; clin@suse.com; conor+dt@kernel.org;
> pierre.gondois@arm.com; Jacky Bai <ping.bai@nxp.com>; Clark Wang
> <xiaoning.wang@nxp.com>; Wei Fang <wei.fang@nxp.com>; Peng Fan
> <peng.fan@nxp.com>; Bough Chen <haibo.chen@nxp.com>;
> festevam@gmail.com; dl-linux-imx <linux-imx@nxp.com>;
> davem@davemloft.net; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Gaurav Jain
> <gaurav.jain@nxp.com>; alexander.stein@ew.tq-group.com; Sahil Malhotra
> <sahil.malhotra@nxp.com>; Aisheng Dong <aisheng.dong@nxp.com>; Varun
> Sethi <V.Sethi@nxp.com>
> Subject: Re: [EXT] Re: [PATCH v4 1/7] dt-bindings: arm: fsl: add se-fw bi=
nding
> doc
>=20
> On Mon, Jul 24, 2023 at 06:37:22AM +0000, Pankaj Gupta wrote:
> > > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> On
> > > 12/07/2023 20:26, Conor Dooley wrote:
> > > > On Wed, Jul 12, 2023 at 05:42:13PM +0530, Pankaj Gupta wrote:
>=20
> > > >> +  value, i.e., supported SoC(s) are imx8ulp, imx93.
>=20
> > > >> +
> > > >> +properties:
> > > >> +  compatible:
> > > >> +    enum:
> > > >> +      - fsl,imx-ele
> > > >
> > > > This looks like a generic compatible, not a specific one, but you
> > > > use it on the imx8ulp. I would have expected that you would have
> > > > something like "fsl,imx8ulp-ele" for that.
> > >
> > > Yeah, this one looks generic, so not what we expect.
> >
> > This change left un-changed in V4. It is "fsl,se-fw", instead of "fsl,i=
mx8ulp-
> ele".
> > I will change in V5.

>=20
> That's a generic compatible too, so no different to "fsl,imx-ele".
> What is the reason for avoiding the SoC-specific "fsl,imx8ulp-ele"?

Sorry. I missed this point.
Not trying to avoid the SoC specific compatible. I will add the soc id to m=
ake the compatible =3D "fsl,se-8ulpfw", instead of "fsl,se-fw".

Thanks for pointing out here.

>=20
> > > >> +      - fsl,imx93-ele