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Message-ID: <dd50f1a2-bd64-ca08-bfb7-ef907291eee1@ti.com>
Date:   Fri, 28 Jul 2023 10:27:05 +0530
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Subject: Re: [PATCH v6 2/5] arm64: dts: ti: k3-j784s4: Add Main CPSW2G node
To:     Tony Lindgren <tony@atomide.com>, <s-vadapalli@ti.com>
CC:     <nm@ti.com>, <vigneshr@ti.com>, <afd@ti.com>,
        <krzysztof.kozlowski+dt@linaro.org>, <kristo@kernel.org>,
        <robh+dt@kernel.org>, <conor+dt@kernel.org>, <rogerq@kernel.org>,
        <a-bhatia1@ti.com>, <r-ravikumar@ti.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
References: <20230721132029.123881-1-j-choudhary@ti.com>
 <20230721132029.123881-3-j-choudhary@ti.com>
 <20230724045032.GU5194@atomide.com>
Content-Language: en-US
From:   Jayesh Choudhary <j-choudhary@ti.com>
In-Reply-To: <20230724045032.GU5194@atomide.com>
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Hello Tony,

On 24/07/23 10:20, Tony Lindgren wrote:
> Hi,
> 
> * Jayesh Choudhary <j-choudhary@ti.com> [230721 13:21]:
>> From: Siddharth Vadapalli <s-vadapalli@ti.com>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>> index 7ad152a1b90f..1e2a26ac9c65 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>> @@ -252,6 +252,30 @@ vdd_sd_dv: regulator-TLV71033 {
>>   };
>>   
>>   &main_pmx0 {
>> +	main_cpsw2g_pins_default: main-cpsw2g-pins-default {
>> +		pinctrl-single,pins = <
>> +			J784S4_IOPAD(0x0b8, PIN_INPUT, 6) /* (AC34) MCASP1_ACLKX.RGMII1_RD0 */
>> +			J784S4_IOPAD(0x0a0, PIN_INPUT, 6) /* (AD34) MCASP0_AXR12.RGMII1_RD1 */
>> +			J784S4_IOPAD(0x0a4, PIN_INPUT, 6) /* (AJ36) MCASP0_AXR13.RGMII1_RD2 */
>> +			J784S4_IOPAD(0x0a8, PIN_INPUT, 6) /* (AF34) MCASP0_AXR14.RGMII1_RD3 */
>> +			J784S4_IOPAD(0x0b0, PIN_INPUT, 6) /* (AL33) MCASP1_AXR3.RGMII1_RXC */
>> +			J784S4_IOPAD(0x0ac, PIN_INPUT, 6) /* (AE34) MCASP0_AXR15.RGMII1_RX_CTL */
>> +			J784S4_IOPAD(0x08c, PIN_INPUT, 6) /* (AE35) MCASP0_AXR7.RGMII1_TD0 */
>> +			J784S4_IOPAD(0x090, PIN_INPUT, 6) /* (AC35) MCASP0_AXR8.RGMII1_TD1 */
>> +			J784S4_IOPAD(0x094, PIN_INPUT, 6) /* (AG35) MCASP0_AXR9.RGMII1_TD2 */
>> +			J784S4_IOPAD(0x098, PIN_INPUT, 6) /* (AH36) MCASP0_AXR10.RGMII1_TD3 */
>> +			J784S4_IOPAD(0x0b4, PIN_INPUT, 6) /* (AL34) MCASP1_AXR4.RGMII1_TXC */
>> +			J784S4_IOPAD(0x09c, PIN_INPUT, 6) /* (AF35) MCASP0_AXR11.RGMII1_TX_CTL */
>> +		>;
>> +	};
> 
> We are standardizing pinctrl-single to use pin group node naming with -pins
> suffix, so in this case main-cpsw2g-default-pins. The same applies for all
> pin group node names. And please use -pins also for a single pin groups as
> new pins may need to be added later on in some cases.
> 
> These changes are to make dtbs checks work for pinctrl-single yaml binding
> as we mostly use a generic compatible and don't want to add all kind of
> custom node name matches.
> 

Thanks for the review.

I am dropping this patch (2/5) based on the comments in [1].
But we will address your comments when we will add this node.

[1]: 
<https://lore.kernel.org/all/5f5269dd-3cff-6fff-909d-355c190001d2@ti.com/>

Warm Regards,
Jayesh