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Date:   Fri, 28 Jul 2023 09:20:22 +0200
From:   richard@bit42.se
To:     srinivas.kandagatla@linaro.org
Cc:     srinivas.kandagatla@linaro.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org,
        niklas.soderlund+renesas@ragnatech.se, robh+dt@kernel.org
Subject: Re: [PATCH v5 2/2] nvmem: add new NXP QorIQ eFuse driver
In-Reply-To: <20230410082051.2948510-2-richard@bit42.se>
References: <20230410082051.2948510-1-richard@bit42.se>
 <20230410082051.2948510-2-richard@bit42.se>
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On 2023-04-10 10:20, Richard Alpe wrote:
> Add SFP (Security Fuse Processor) read support for NXP (Freescale)
> QorIQ series SOC's.
> 
> This patch adds support for the T1023 SOC using the SFP offset from
> the existing T1023 device tree. In theory this should also work for
> T1024, T1014 and T1013 which uses the same SFP base offset.
> 
> Signed-off-by: Richard Alpe <richard@bit42.se>
> ---
> v2: Rebase.
> v3: Updates according to feedback from Srinivas.
> v4,v5: No changes to this patch.
> 
>  drivers/nvmem/Kconfig       | 12 ++++++
>  drivers/nvmem/Makefile      |  2 +
>  drivers/nvmem/qoriq-efuse.c | 78 +++++++++++++++++++++++++++++++++++++
>  3 files changed, 92 insertions(+)
>  create mode 100644 drivers/nvmem/qoriq-efuse.c
> 
> diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
> index 6dec38805041..43446e5f7d9b 100644
> --- a/drivers/nvmem/Kconfig
> +++ b/drivers/nvmem/Kconfig
> @@ -377,4 +377,16 @@ config NVMEM_ZYNQMP
> 
>  	  If sure, say yes. If unsure, say no.
> 
> +config NVMEM_QORIQ_EFUSE
> +	tristate "NXP QorIQ eFuse support"
> +	depends on PPC_85xx || COMPILE_TEST
> +	depends on HAS_IOMEM
> +	help
> +	  This driver provides read support for the eFuses (SFP) on NXP QorIQ
> +	  series SoC's. This includes secure boot settings, the globally 
> unique
> +	  NXP ID 'FUIDR' and the OEM unique ID 'OUIDR'.
> +
> +	  This driver can also be built as a module. If so, the module
> +	  will be called nvmem_qoriq_efuse.
> +
>  endif
> diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
> index 6a1efffa88f0..b8fdf9b51953 100644
> --- a/drivers/nvmem/Makefile
> +++ b/drivers/nvmem/Makefile
> @@ -74,3 +74,5 @@ obj-$(CONFIG_NVMEM_VF610_OCOTP)		+= 
> nvmem-vf610-ocotp.o
>  nvmem-vf610-ocotp-y			:= vf610-ocotp.o
>  obj-$(CONFIG_NVMEM_ZYNQMP)		+= nvmem_zynqmp_nvmem.o
>  nvmem_zynqmp_nvmem-y			:= zynqmp_nvmem.o
> +obj-$(CONFIG_NVMEM_QORIQ_EFUSE)		+= nvmem-qoriq-efuse.o
> +nvmem-qoriq-efuse-y			:= qoriq-efuse.o
> diff --git a/drivers/nvmem/qoriq-efuse.c b/drivers/nvmem/qoriq-efuse.c
> new file mode 100644
> index 000000000000..e7fd04d6dd94
> --- /dev/null
> +++ b/drivers/nvmem/qoriq-efuse.c
> @@ -0,0 +1,78 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + *  Copyright (C) 2023  Westermo Network Technologies AB
> + */
> +
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/nvmem-provider.h>
> +#include <linux/platform_device.h>
> +
> +struct qoriq_efuse_priv {
> +	void __iomem *base;
> +};
> +
> +static int qoriq_efuse_read(void *context, unsigned int offset, void 
> *val,
> +			    size_t bytes)
> +{
> +	struct qoriq_efuse_priv *priv = context;
> +
> +	/* .stride = 4 so offset is guaranteed to be aligned */
> +	__ioread32_copy(val, priv->base + offset, bytes / 4);
> +
> +	/* Ignore trailing bytes (there shouldn't be any) */
> +
> +	return 0;
> +}
> +
> +static int qoriq_efuse_probe(struct platform_device *pdev)
> +{
> +	struct nvmem_config config = {
> +		.dev = &pdev->dev,
> +		.read_only = true,
> +		.reg_read = qoriq_efuse_read,
> +		.stride = sizeof(u32),
> +		.word_size = sizeof(u32),
> +		.name = "qoriq_efuse_read",
> +		.id = NVMEM_DEVID_AUTO,
> +		.root_only = true,
> +	};
> +	struct qoriq_efuse_priv *priv;
> +	struct nvmem_device *nvmem;
> +	struct resource *res;
> +
> +	priv = devm_kzalloc(config.dev, sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +
> +	priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
> +	if (IS_ERR(priv->base))
> +		return PTR_ERR(priv->base);
> +
> +	config.size = resource_size(res);
> +	config.priv = priv;
> +	nvmem = devm_nvmem_register(config.dev, &config);
> +
> +	return PTR_ERR_OR_ZERO(nvmem);
> +}
> +
> +static const struct of_device_id qoriq_efuse_of_match[] = {
> +	{ .compatible = "fsl,t1023-sfp", },
> +	{/* sentinel */},
> +};
> +MODULE_DEVICE_TABLE(of, qoriq_efuse_of_match);
> +
> +static struct platform_driver qoriq_efuse_driver = {
> +	.probe = qoriq_efuse_probe,
> +	.driver = {
> +		.name = "qoriq-efuse",
> +		.of_match_table = qoriq_efuse_of_match,
> +	},
> +};
> +module_platform_driver(qoriq_efuse_driver);
> +
> +MODULE_AUTHOR("Richard Alpe <richard.alpe@bit42.se>");
> +MODULE_DESCRIPTION("NXP QorIQ Security Fuse Processor (SFP) Reader");
> +MODULE_LICENSE("GPL");

Gentle ping on this Srinivas