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Message-ID: <79619e92b70fdb4b324758ddb34f84b3b8963256.camel@maquefel.me>
Subject: Re: [PATCH v3 07/42] soc: Add SoC driver for Cirrus ep93xx
From:   Nikita Shubin <nikita.shubin@maquefel.me>
To:     Andy Shevchenko <andy@kernel.org>
Cc:     Alexander Sverdlin <alexander.sverdlin@gmail.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        linux-kernel@vger.kernel.org
Date:   Fri, 28 Jul 2023 12:28:05 +0300
In-Reply-To: <ZLqSo6B5cJXVRJS/@smile.fi.intel.com>
References: <20230605-ep93xx-v3-0-3d63a5f1103e@maquefel.me>
         <20230605-ep93xx-v3-7-3d63a5f1103e@maquefel.me>
         <ZLqSo6B5cJXVRJS/@smile.fi.intel.com>
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Hello Andy!

On Fri, 2023-07-21 at 17:13 +0300, Andy Shevchenko wrote:
> On Thu, Jul 20, 2023 at 02:29:07PM +0300, Nikita Shubin via B4 Relay
> wrote:
> > From: Nikita Shubin <nikita.shubin@maquefel.me>
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0spin_lock_irqsave(&ep93xx_sw=
lock, flags);
> > +
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0regmap_read(map, EP93XX_SYSC=
ON_DEVCFG, &val);
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0val &=3D ~clear_bits;
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0val |=3D set_bits;
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0regmap_write(map, EP93XX_SYS=
CON_SWLOCK,
> > EP93XX_SWLOCK_MAGICK);
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0regmap_write(map, EP93XX_SYS=
CON_DEVCFG, val);
>=20
> Is this sequence a must?
> I.o.w. can you first supply magic and then update devcfg?
>=20

Unfortunately it is a must to write EP93XX_SYSCON_SWLOCK and only then
the next write to swlocked registers will succeed.