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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a12-20020a17090682cc00b0098e3e818952si2240210ejy.326.2023.07.28.10.40.59; Fri, 28 Jul 2023 10:41:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b="J3bK/oJe"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=lunn.ch Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235135AbjG1Q4p (ORCPT + 99 others); Fri, 28 Jul 2023 12:56:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233272AbjG1Q43 (ORCPT ); Fri, 28 Jul 2023 12:56:29 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 840D41BE8; Fri, 28 Jul 2023 09:56:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=K70CKmBBT3LezttIHw7dBV6di1pK5wjt+ZfncAAM8eg=; b=J3bK/oJe/QpSNDl0GX966l3Us7 YkS8XKvV7D8VdgjitBaRQq2hKvL2FQwAkphg38AhqKsHoNdJVyfgQvCYpWdDfHY04x9cSUzJjbKBG K5z8CYpU6oWOSnulwS1LYhlwNY6I0uGyM36CplcmklP4kLb3zMelQdHRUKPMq8x/+EFI=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1qPQkg-002Xp3-R6; Fri, 28 Jul 2023 18:55:42 +0200 Date: Fri, 28 Jul 2023 18:55:42 +0200 From: Andrew Lunn To: Shenwei Wang Cc: Fabio Estevam , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Shawn Guo , Sascha Hauer , Neil Armstrong , Kevin Hilman , Vinod Koul , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Pengutronix Kernel Team , dl-linux-imx , Jerome Brunet , Martin Blumenstingl , Bhupesh Sharma , Nobuhiro Iwamatsu , Simon Horman , Andrew Halaney , Bartosz Golaszewski , Wong Vee Khee , Revanth Kumar Uppala , Jochen Henneberg , "netdev@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-amlogic@lists.infradead.org" , "imx@lists.linux.dev" , Frank Li Subject: Re: [EXT] Re: [PATCH v2 net 2/2] net: stmmac: dwmac-imx: pause the TXC clock in fixed-link Message-ID: References: <20230727152503.2199550-1-shenwei.wang@nxp.com> <20230727152503.2199550-3-shenwei.wang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > Andrew Lunn gave the following feedback in v1: > > > > "The SJA1105 has the problem, so i would expect it to be involved in the solution. > > Otherwise, how is this going to work for other MAC drivers? > > > > Maybe you need to expose a common clock framework clock for the TXC clock > > line, which the SJA1105 can disable/enable? That then makes it clear what other > > MAC drivers need to do." > > I have been considering this plan for some time. The idea should be implemented > across all i.mx8/9 platforms. I am going to start to work on it in the following month, > and it will take some time to implement it. So you don't think anybody will use anything else for driving this switch? Vybrid? It does not really matter what you implement it for, so long is at is a clear example for others to follow who might be using the switch with other SoCs. Andrew