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From:   Guo Ren <guoren@kernel.org>
Date:   Mon, 31 Jul 2023 08:49:17 +0800
Message-ID: <CAJF2gTTRHzT+CEtb1LVYdfCorVUdLvCh_eMxrmC=xjdQ_JS6Sg@mail.gmail.com>
Subject: Re: [PATCH v10 3/6] riscv: mm: dma-noncoherent: nonstandard cache
 operations support
To:     =?UTF-8?Q?Heiko_St=C3=BCbner?= <heiko@sntech.de>,
        Arnd Bergmann <arnd@arndb.de>
Cc:     Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        Jisheng Zhang <jszhang@kernel.org>,
        Prabhakar <prabhakar.csengg@gmail.com>,
        "Conor.Dooley" <conor.dooley@microchip.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Andrew Jones <ajones@ventanamicro.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Samuel Holland <samuel@sholland.org>,
        linux-riscv@lists.infradead.org,
        Christoph Hellwig <hch@infradead.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        Biju Das <biju.das.jz@bp.renesas.com>,
        "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
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On Mon, Jul 31, 2023 at 4:36=E2=80=AFAM Arnd Bergmann <arnd@arndb.de> wrote=
:
>
> On Sun, Jul 30, 2023, at 17:42, Emil Renner Berthing wrote:
> > On Sun, 30 Jul 2023 at 17:11, Jisheng Zhang <jszhang@kernel.org> wrote:
>
> >> > +
> >> >  static inline void arch_dma_cache_wback(phys_addr_t paddr, size_t s=
ize)
> >> >  {
> >> >       void *vaddr =3D phys_to_virt(paddr);
> >> >
> >> > +#ifdef CONFIG_RISCV_NONSTANDARD_CACHE_OPS
> >> > +     if (unlikely(noncoherent_cache_ops.wback)) {
> >>
> >> I'm worried about the performance impact here.
> >> For unified kernel Image reason, RISCV_NONSTANDARD_CACHE_OPS will be
> >> enabled by default, so standard CMO and T-HEAD's CMO platform's
> >> performance will be impacted, because even an unlikely is put
> >> here, the check action still needs to be done.
> >
> > On IRC I asked why not use a static key so the overhead is just a
> > single nop when the standard CMO ops are available, but the consensus
> > seemed to be that the flushing would completely dominate this branch.
> > And on platforms with the standard CMO ops the branch be correctly
> > predicted anyway.
>
> Not just the flushing, but also loading back the invalidated
> cache lines afterwards is just very expensive. I don't think
> you would be able to measure a difference between the static
> key and a correctly predicted branch on any relevant usecase here.
Maybe we should move CMO & THEAD ops to the noncoherent_cache_ops, and
only keep one of them.

I prefer noncoherent_cache_ops, it's more maintance than ALTERNATIVE.

Heiko, How do you think about this?

>
>      Arnd


--=20
Best Regards
 Guo Ren