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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id h11-20020ac25d6b000000b004fa4323ec97sm1899712lft.301.2023.07.30.21.15.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 30 Jul 2023 21:15:42 -0700 (PDT) Message-ID: Date: Mon, 31 Jul 2023 07:15:42 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH RFC v5 09/10] drm/msm/dpu: Use DRM solid_fill property Content-Language: en-GB To: Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Clark , Sean Paul , Marijn Suijten Cc: quic_abhinavk@quicinc.com, ppaalanen@gmail.com, contact@emersion.fr, laurent.pinchart@ideasonboard.com, sebastian.wick@redhat.com, ville.syrjala@linux.intel.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, wayland-devel@lists.freedesktop.org References: <20230728-solid-fill-v5-0-053dbefa909c@quicinc.com> <20230728-solid-fill-v5-9-053dbefa909c@quicinc.com> From: Dmitry Baryshkov In-Reply-To: <20230728-solid-fill-v5-9-053dbefa909c@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/07/2023 20:02, Jessica Zhang wrote: > Drop DPU_PLANE_COLOR_FILL_FLAG and check the DRM solid_fill property to > determine if the plane is solid fill. In addition drop the DPU plane > color_fill field as we can now use drm_plane_state.solid_fill instead, > and pass in drm_plane_state.alpha to _dpu_plane_color_fill_pipe() to > allow userspace to configure the alpha value for the solid fill color. > > Reviewed-by: Dmitry Baryshkov > Signed-off-by: Jessica Zhang > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 24 ++++++++++++++++++------ > 1 file changed, 18 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index 114c803ff99b..95fc0394d13e 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -42,7 +42,6 @@ > #define SHARP_SMOOTH_THR_DEFAULT 8 > #define SHARP_NOISE_THR_DEFAULT 2 > > -#define DPU_PLANE_COLOR_FILL_FLAG BIT(31) > #define DPU_ZPOS_MAX 255 > > /* > @@ -82,7 +81,6 @@ struct dpu_plane { > > enum dpu_sspp pipe; > > - uint32_t color_fill; > bool is_error; > bool is_rt_pipe; > const struct dpu_mdss_cfg *catalog; > @@ -606,6 +604,20 @@ static void _dpu_plane_color_fill_pipe(struct dpu_plane_state *pstate, > _dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg, pstate->rotation); > } > > +static uint32_t _dpu_plane_get_bgr_fill_color(struct drm_solid_fill solid_fill) As I commented for v4 (please excuse me for not responding to your email at thattime), we can return abgr here, taking plane->state->alpha into account. > +{ > + uint32_t ret = 0; > + uint8_t b = solid_fill.b >> 24; > + uint8_t g = solid_fill.g >> 24; > + uint8_t r = solid_fill.r >> 24; > + > + ret |= b << 16; > + ret |= g << 8; > + ret |= r; > + > + return ret; > +} > + > /** > * _dpu_plane_color_fill - enables color fill on plane > * @pdpu: Pointer to DPU plane object > @@ -977,9 +989,9 @@ void dpu_plane_flush(struct drm_plane *plane) > if (pdpu->is_error) > /* force white frame with 100% alpha pipe output on error */ > _dpu_plane_color_fill(pdpu, 0xFFFFFF, 0xFF); > - else if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) > - /* force 100% alpha */ > - _dpu_plane_color_fill(pdpu, pdpu->color_fill, 0xFF); > + else if (drm_plane_solid_fill_enabled(plane->state)) > + _dpu_plane_color_fill(pdpu, _dpu_plane_get_bgr_fill_color(plane->state->solid_fill), > + plane->state->alpha); > else { > dpu_plane_flush_csc(pdpu, &pstate->pipe); > dpu_plane_flush_csc(pdpu, &pstate->r_pipe); > @@ -1024,7 +1036,7 @@ static void dpu_plane_sspp_update_pipe(struct drm_plane *plane, > } > > /* override for color fill */ > - if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) { > + if (drm_plane_solid_fill_enabled(plane->state)) { > _dpu_plane_set_qos_ctrl(plane, pipe, false); > > /* skip remaining processing on color fill */ > -- With best wishes Dmitry