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[2620:137:e000::1:20]) by mx.google.com with ESMTP id c6-20020a170902d48600b001adc5bc4d8asi7912098plg.572.2023.07.31.12.14.42; Mon, 31 Jul 2023 12:14:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=m8o6k8Ee; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233638AbjGaQ5e (ORCPT + 99 others); Mon, 31 Jul 2023 12:57:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233615AbjGaQ5a (ORCPT ); Mon, 31 Jul 2023 12:57:30 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A5D9173D; Mon, 31 Jul 2023 09:57:29 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-210-008.ewe-ip-backbone.de [91.248.210.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3B76A6607120; Mon, 31 Jul 2023 17:57:27 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1690822647; bh=GALTLk1kp81TWDcsFroSmRcnp70s2ikSUk1HG3RlfRQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m8o6k8EeKx1zZBOOe15TBm+kY3BiWkBrpBe1QCi3B2ASi0BP+YRrlZo/DcpQAE6DD zUKWnwga9ntBIeWnxw2JBlQT61uR3qyMB2u/M+A1DqvFOA546BpJHDSAqTtd+tcR2B qbWHBv/YwJ2jCoI6wMSLakWWUr8QReeq9qzAHhuhyAyPO5rCRxPw+34zmwxloE98tW R/hQv61gjw4lpnZyOFIpQeVDM94FvsfEVs7FVjnasnwkSuQKTjT/3R3iPt+dcpbWnn jplEbS7299jwVwdmWe7jb0mOhe5KT572ytQ+tgQIp8GlQheF3dHc1UvZpL+IZDSmyJ pB73OuR0dPTPw== Received: by jupiter.universe (Postfix, from userid 1000) id 2E1184800B0; Mon, 31 Jul 2023 18:57:25 +0200 (CEST) From: Sebastian Reichel To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, Serge Semin Cc: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v4 4/5] dt-bindings: PCI: dwc: rockchip: Add missing legacy-interrupt-controller Date: Mon, 31 Jul 2023 18:57:22 +0200 Message-Id: <20230731165723.53069-5-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230731165723.53069-1-sebastian.reichel@collabora.com> References: <20230731165723.53069-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rockchip RK356x and RK3588 handle legacy interrupts via a ganged interrupts. The RK356x DT implements this via a sub-node named "legacy-interrupt-controller", just like a couple of other PCIe implementations. This adds proper documentation for this and updates the example to avoid regressions. Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel --- .../bindings/pci/rockchip-dw-pcie.yaml | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index ad9954f7fe02..1ae8dcfa072c 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -93,6 +93,28 @@ properties: - const: legacy - const: err + legacy-interrupt-controller: + description: Interrupt controller node for handling legacy PCI interrupts. + type: object + additionalProperties: false + properties: + "#address-cells": + const: 0 + + "#interrupt-cells": + const: 1 + + interrupt-controller: true + + interrupts: + items: + - description: combined legacy interrupt + required: + - "#address-cells" + - "#interrupt-cells" + - interrupt-controller + - interrupts + msi-map: true num-lanes: true @@ -180,6 +202,14 @@ examples: reset-names = "pipe"; #address-cells = <3>; #size-cells = <2>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; }; }; ... -- 2.40.1