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From:   Thomas Gleixner <tglx@linutronix.de>
To:     "Michael Kelley (LINUX)" <mikelley@microsoft.com>,
        Peter Zijlstra <peterz@infradead.org>
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Subject: RE: [patch v2 21/38] x86/cpu: Provide cpu_init/parse_topology()
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Date:   Tue, 01 Aug 2023 00:12:37 +0200
Message-ID: <873513n31m.ffs@tglx>
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On Mon, Jul 31 2023 at 21:27, Michael Kelley wrote:
> From: Thomas Gleixner <tglx@linutronix.de> Sent: Monday, July 31, 2023 1:49 PM
>> Is there any indication in some other CPUID leaf which lets us deduce this
>> wreckage?
>
> You can detect being a Hyper-V guest with leaf 0x40000000.  See Linux
> kernel function ms_hyperv_platform().  But I'm not aware of anything
> to indicate that a specific Hyper-V VM has the APIC numbering problem
> vs. doesn't have the problem.

That's what I said :) here:

>> I don't think the hypervisor space (0x40000xx) has anything helpful, but
>> staring at the architectural ones provided by hyper-V to the guest might
>> give us an hint. Can you provide a cpuid dump for the boot CPU please?
>> 
>
> I'm not sure if you want the raw or decoded output.  Here's both.

Either way is fine.

Clearly the hyper-v BIOS people put a lot of thoughts into this:

>    x2APIC features / processor topology (0xb):
>       extended APIC ID                      = 0
>       --- level 0 ---
>       level number                          = 0x0 (0)
>       level type                            = thread (1)
>       bit width of level                    = 0x1 (1)
>       number of logical processors at level = 0x2 (2)
>       --- level 1 ---
>       level number                          = 0x1 (1)
>       level type                            = core (2)
>       bit width of level                    = 0x6 (6)
>       number of logical processors at level = 0x40 (64)

FAIL:                                           ^^^^^

While that field is not meant for topology evaluation it is at least
expected to tell the actual number of logical processors at that level
which are actually available. 

The CPUID APIC ID aka initial_apicid clearly tells that the topology has
36 logical CPUs in package 0 and 36 in package 1 according to your
table.

On real hardware this looks like this:

      --- level 1 ---
      level number                          = 0x1 (1)
      level type                            = core (2)
      bit width of level                    = 0x6 (6)
      number of logical processors at level = 0x38 (56)

Which corresponds to reality and is consistent. But sure, consistency is
overrated.

Thanks,

        tglx