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Message-ID: <71924c34-c398-22d7-bc79-50b0df482a22@quicinc.com>
Date:   Tue, 1 Aug 2023 11:40:39 +0530
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Subject: Re: [PATCH v5 2/2] nvmem: sec-qfprom: Add Qualcomm secure QFPROM
 support
Content-Language: en-US
To:     Bjorn Andersson <andersson@kernel.org>,
        Mukesh Ojha <quic_mojha@quicinc.com>
CC:     <agross@kernel.org>, <konrad.dybcio@linaro.org>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <conor+dt@kernel.org>, <srinivas.kandagatla@linaro.org>,
        <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
References: <20230724083849.8277-1-quic_kbajaj@quicinc.com>
 <20230724083849.8277-3-quic_kbajaj@quicinc.com>
 <9f417fea-38cf-942b-514e-99b47f27c544@quicinc.com>
 <wst227b45le3ql6ctkdiyiynae7ipy3gqiz6ibhbxau4bogb5o@w25vnllnwnw7>
From:   Komal Bajaj <quic_kbajaj@quicinc.com>
In-Reply-To: <wst227b45le3ql6ctkdiyiynae7ipy3gqiz6ibhbxau4bogb5o@w25vnllnwnw7>
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On 7/31/2023 10:05 PM, Bjorn Andersson wrote:
> On Thu, Jul 27, 2023 at 12:09:07PM +0530, Mukesh Ojha wrote:
>> On 7/24/2023 2:08 PM, Komal Bajaj wrote:
> [..]
>>> diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
>>> index f82431ec8aef..e248d3daadf3 100644
>>> --- a/drivers/nvmem/Makefile
>>> +++ b/drivers/nvmem/Makefile
>>> @@ -44,6 +44,8 @@ obj-$(CONFIG_NVMEM_NINTENDO_OTP)	+= nvmem-nintendo-otp.o
>>>    nvmem-nintendo-otp-y			:= nintendo-otp.o
>>>    obj-$(CONFIG_NVMEM_QCOM_QFPROM)		+= nvmem_qfprom.o
>>>    nvmem_qfprom-y				:= qfprom.o
>>> +obj-$(CONFIG_NVMEM_QCOM_SEC_QFPROM)	+= nvmem_sec_qfprom.o
>>> +nvmem_sec_qfprom-y			:= sec-qfprom.o
>> Are we just doing this for just renaming the object ?
>>
> Correct.
>
>>>    obj-$(CONFIG_NVMEM_RAVE_SP_EEPROM)	+= nvmem-rave-sp-eeprom.o
>>>    nvmem-rave-sp-eeprom-y			:= rave-sp-eeprom.o
>>>    obj-$(CONFIG_NVMEM_RMEM) 		+= nvmem-rmem.o
>>> diff --git a/drivers/nvmem/sec-qfprom.c b/drivers/nvmem/sec-qfprom.c
> [..]
>>> +static int sec_qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes)
>>> +{
>>> +	struct sec_qfprom *priv = context;
>>> +	unsigned int i;
>>> +	u8 *val = _val;
>>> +	u32 read_val;
>>> +	u8 *tmp;
>>> +
>>> +	for (i = 0; i < bytes; i++, reg++) {
>>> +		if (i == 0 || reg % 4 == 0) {
>>> +			if (qcom_scm_io_readl(priv->base + (reg & ~3), &read_val)) {
>>> +				dev_err(priv->dev, "Couldn't access fuse register\n");
>>> +				return -EINVAL;
>>> +			}
>>> +			tmp = (u8 *)&read_val;
>>> +		}
>>> +
>>> +		val[i] = tmp[reg & 3];
>>> +	}
>> Getting secure read from fuse region is fine here, since we have to read
>> 4 byte from trustzone, but this restriction of reading is also there
>> for sm8{4|5}50 soc's where byte by byte reading is protected and granularity
>> set to 4 byte (qfprom_reg_read() in drivers/nvmem/qfprom.c)
>> is will result in abort, in  that case this function need to export this
>> logic.
>>
> If qfprom needs similar treatment, then let's land this first and then
> consider generalizing (i.e. move to some library code) this - or if
> infeasible, just fix qfprom_reg_read().

Agree, I will implement this logic into qfprom driver (into 
qfprom_reg_read() ) in a separate patch.

Thanks
Komal
>
> Regards,
> Bjorn