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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k12-20020a636f0c000000b0055b618c77f6si2942912pgc.180.2023.08.01.00.46.00; Tue, 01 Aug 2023 00:46:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b="w8vwOc/h"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229550AbjHAGoh (ORCPT + 99 others); Tue, 1 Aug 2023 02:44:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231197AbjHAGof (ORCPT ); Tue, 1 Aug 2023 02:44:35 -0400 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3019DC6 for ; Mon, 31 Jul 2023 23:44:31 -0700 (PDT) Received: by mail-pj1-x1036.google.com with SMTP id 98e67ed59e1d1-26837895fbbso3885717a91.3 for ; Mon, 31 Jul 2023 23:44:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690872270; x=1691477070; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=AjcjOe+3KylO9pMc2ZyArss7NYIx0VmzNX+VO4a56sU=; b=w8vwOc/hOBXr2HSq6xwFW2pb8ouqiVVlzbKT5LvFvtU6utTLplLpCOXPmxbN9b0Mta bvBO7/dE06xC+Cm2uAkQHJAn5HliImtqN069PpCtY3AATeOKXpka/5xUJ5GXoKm5gpPo 1lTkmH3f2pHzyuZYyiy+VL0klugDRmGvQyRMWe+slhdO2+wQsUFddYX/YEnyEu20Z9s8 +cgFZ2q+UgmzBp6O1B56XnoPmBTpJPZeTUPPmohpiDq2uwiC/ZnAVvn2O1X2K0m3R8TO /agKY6AMWp1x6tVMnhI49VwWlDPFJEmQSuxzYM19Dv77/j1Lp7ZIvITlC5cljl+Rv0bl mVfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690872270; x=1691477070; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AjcjOe+3KylO9pMc2ZyArss7NYIx0VmzNX+VO4a56sU=; b=f2HYZ7MtTiFzfSBuOvgC4Jgf5tO7yc3yYp6kbDvfX92tq3bd8UDbG1pbaXStjn/nz+ BT7vb+N0nPDSsl+NXrGBF3FUo+yKhZK+AkpOGEfjmzXneEmV12I2SnNJrRvIWrCncclO T0ONxyrckOdxW0jwOeVfMFAtjfweiJbQtEQoIyRsw+Tdy5DgHtPK0PuvSL7nsrEPM+eG mcLGOKLI1zE1lvhzcI74axKsuOq/Z3KS3d2W7BbWDwtr3kNEYaSfszUrKI46hjdZx35v qBbnvnuarPQEubbT0iCS+6s7aijGjybzg8LIhfW9wtnzp8fD9fzpUIl7+XVCV7bPS5FU Tcsw== X-Gm-Message-State: ABy/qLakGt/SKzyydvXJUve0NElGo2txw2JCMpzpYHFCWYgdveEs5yyg gqOO5/LY3W6IFfMr5PeqdUj1REngBxamw/9Jr3hJNQ== X-Received: by 2002:a17:90b:238f:b0:268:e31b:decd with SMTP id mr15-20020a17090b238f00b00268e31bdecdmr1912125pjb.11.1690872270443; Mon, 31 Jul 2023 23:44:30 -0700 (PDT) MIME-Version: 1.0 References: <20230703-fix-boe-tv101wum-nl6-v3-0-bd6e9432c755@linaro.org> <20230703-fix-boe-tv101wum-nl6-v3-3-bd6e9432c755@linaro.org> In-Reply-To: <20230703-fix-boe-tv101wum-nl6-v3-3-bd6e9432c755@linaro.org> From: cong yang Date: Tue, 1 Aug 2023 14:44:18 +0800 Message-ID: Subject: Re: [PATCH v3 3/4] drm/panel: ili9882t: Break out as separate driver To: Linus Walleij Cc: Ruihai Zhou , Stephen Boyd , Douglas Anderson , Jitao Shi , Neil Armstrong , Sam Ravnborg , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Hsin-Yi Wang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Jul 3, 2023 at 9:21=E2=80=AFPM Linus Walleij wrote: > > The Starry ILI9882t-based panel should never have been part of the boe > tv101wum driver, it is clearly based on the Ilitek ILI9882t display > controller and if you look at the custom command sequences for the > panel these clearly contain the signature Ilitek page switch (0xff) > commands. The hardware has nothing in common with the other panels > supported by this driver. > > Break this out into a separate driver and config symbol instead. > > If the placement here is out of convenience for using similar code, > we should consider creating a helper library instead. > > Signed-off-by: Linus Walleij > --- > drivers/gpu/drm/panel/Kconfig | 9 + > drivers/gpu/drm/panel/Makefile | 1 + > drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 386 ------------- > drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 739 +++++++++++++++++++= ++++++ > 4 files changed, 749 insertions(+), 386 deletions(-) > > diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfi= g > index 1a0fd0754692..c39e949a26eb 100644 > --- a/drivers/gpu/drm/panel/Kconfig > +++ b/drivers/gpu/drm/panel/Kconfig > @@ -203,6 +203,15 @@ config DRM_PANEL_ILITEK_ILI9881C > Say Y if you want to enable support for panels based on the > Ilitek ILI9881c controller. > > +config DRM_PANEL_ILITEK_ILI9882T > + tristate "Ilitek ILI9882t-based panels" > + depends on OF > + depends on DRM_MIPI_DSI > + depends on BACKLIGHT_CLASS_DEVICE > + help > + Say Y if you want to enable support for panels based on the > + Ilitek ILI9882t controller. > + > config DRM_PANEL_INNOLUX_EJ030NA > tristate "Innolux EJ030NA 320x480 LCD panel" > depends on OF && SPI > diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makef= ile > index 499e38244253..75c2533d337e 100644 > --- a/drivers/gpu/drm/panel/Makefile > +++ b/drivers/gpu/drm/panel/Makefile > @@ -18,6 +18,7 @@ obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) +=3D panel-himax-h= x8394.o > obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) +=3D panel-ilitek-ili9322.o > obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) +=3D panel-ilitek-ili9341.o > obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) +=3D panel-ilitek-ili9881c.o > +obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) +=3D panel-ilitek-ili9882t.o > obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) +=3D panel-innolux-ej030na.o > obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) +=3D panel-innolux-p079zca.o > obj-$(CONFIG_DRM_PANEL_JADARD_JD9365DA_H3) +=3D panel-jadard-jd9365da-h3= .o > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu= /drm/panel/panel-boe-tv101wum-nl6.c > index 358918e0f03f..14a0ee95a803 100644 > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > @@ -1348,361 +1348,6 @@ static int starry_himax83102_j02_init(struct mipi= _dsi_device *dsi) > return 0; > }; > > - > -static int starry_ili9882t_init(struct mipi_dsi_device *dsi) > -{ > - int ret; > - > - msleep(5); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x42); > - mipi_dsi_dcs_write_seq(dsi, 0x01, 0x11); > - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x03, 0x00); > - > - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x11); > - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00); > - > - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x80); > - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x81); > - mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x71); > - mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x00); > - > - mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x1A); > - > - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x26, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00); > - > - mipi_dsi_dcs_write_seq(dsi, 0x2C, 0xD4); > - mipi_dsi_dcs_write_seq(dsi, 0xB9, 0x40); > - > - mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x11); > - > - mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x32); > - mipi_dsi_dcs_write_seq(dsi, 0xD1, 0x30); > - > - mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55); > - > - mipi_dsi_dcs_write_seq(dsi, 0xD0, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0xE3, 0x93); > - mipi_dsi_dcs_write_seq(dsi, 0xE4, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x80); > - > - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x32, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x36, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x37, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x28); > - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x29); > - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x11); > - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x13); > - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x15); > - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x17); > - mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x09); > - mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x0D); > - mipi_dsi_dcs_write_seq(dsi, 0x40, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x41, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x42, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x43, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x44, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x45, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x46, 0x02); > - > - mipi_dsi_dcs_write_seq(dsi, 0x47, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x48, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x49, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x4A, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x4B, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x4C, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x4D, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x4E, 0x28); > - mipi_dsi_dcs_write_seq(dsi, 0x4F, 0x29); > - mipi_dsi_dcs_write_seq(dsi, 0x50, 0x10); > - mipi_dsi_dcs_write_seq(dsi, 0x51, 0x12); > - mipi_dsi_dcs_write_seq(dsi, 0x52, 0x14); > - mipi_dsi_dcs_write_seq(dsi, 0x53, 0x16); > - mipi_dsi_dcs_write_seq(dsi, 0x54, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0x55, 0x0C); > - mipi_dsi_dcs_write_seq(dsi, 0x56, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x57, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x58, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x59, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x5A, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x5B, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x5C, 0x02); > - > - mipi_dsi_dcs_write_seq(dsi, 0x61, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x63, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x65, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x66, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x68, 0x28); > - mipi_dsi_dcs_write_seq(dsi, 0x69, 0x29); > - mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x16); > - mipi_dsi_dcs_write_seq(dsi, 0x6B, 0x14); > - mipi_dsi_dcs_write_seq(dsi, 0x6C, 0x12); > - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x10); > - mipi_dsi_dcs_write_seq(dsi, 0x6E, 0x0C); > - mipi_dsi_dcs_write_seq(dsi, 0x6F, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0x70, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x71, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x72, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x73, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x74, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x75, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x76, 0x02); > - > - mipi_dsi_dcs_write_seq(dsi, 0x77, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x78, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x79, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x7A, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x7B, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x7C, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x7D, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x7E, 0x28); > - mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x29); > - mipi_dsi_dcs_write_seq(dsi, 0x80, 0x17); > - mipi_dsi_dcs_write_seq(dsi, 0x81, 0x15); > - mipi_dsi_dcs_write_seq(dsi, 0x82, 0x13); > - mipi_dsi_dcs_write_seq(dsi, 0x83, 0x11); > - mipi_dsi_dcs_write_seq(dsi, 0x84, 0x0D); > - mipi_dsi_dcs_write_seq(dsi, 0x85, 0x09); > - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x87, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x88, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x89, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x8A, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x8B, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x8C, 0x07); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x3A); > - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x3B); > - > - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0C); > - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x44); > - > - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x11); > - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0C); > - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x44); > - > - mipi_dsi_dcs_write_seq(dsi, 0x53, 0x1F); > - mipi_dsi_dcs_write_seq(dsi, 0x5E, 0x40); > - mipi_dsi_dcs_write_seq(dsi, 0x84, 0x00); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x03); > - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x21, 0x3C); > - mipi_dsi_dcs_write_seq(dsi, 0x22, 0xFA); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0xE2, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0xE5, 0x91); > - mipi_dsi_dcs_write_seq(dsi, 0xE6, 0x3C); > - mipi_dsi_dcs_write_seq(dsi, 0xE7, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0xE8, 0xFA); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x12); > - mipi_dsi_dcs_write_seq(dsi, 0x87, 0x2C); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05); > - mipi_dsi_dcs_write_seq(dsi, 0x73, 0xE5); > - mipi_dsi_dcs_write_seq(dsi, 0x7F, 0x6B); > - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0xA4); > - mipi_dsi_dcs_write_seq(dsi, 0x79, 0x54); > - mipi_dsi_dcs_write_seq(dsi, 0x69, 0x97); > - mipi_dsi_dcs_write_seq(dsi, 0x6A, 0x97); > - mipi_dsi_dcs_write_seq(dsi, 0xA5, 0x3F); > - mipi_dsi_dcs_write_seq(dsi, 0x61, 0xDA); > - mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xF1); > - mipi_dsi_dcs_write_seq(dsi, 0x5F, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x3F); > - mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x90); > - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06); > - mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x80); > - mipi_dsi_dcs_write_seq(dsi, 0xC1, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0xCA, 0x58); > - mipi_dsi_dcs_write_seq(dsi, 0xCB, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0xCE, 0x58); > - mipi_dsi_dcs_write_seq(dsi, 0xCF, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x60); > - mipi_dsi_dcs_write_seq(dsi, 0x10, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22); > - mipi_dsi_dcs_write_seq(dsi, 0xD3, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0xD6, 0x55); > - mipi_dsi_dcs_write_seq(dsi, 0xDC, 0x38); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0= x56, 0x6A, 0x6E, 0x79, > - 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, = 0xBB, 0xCE, 0xC6, 0xBD, > - 0xD5, 0xE2, 0xE8); > - mipi_dsi_dcs_write_seq(dsi, 0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0= x56, 0x6A, 0x6E, 0x79, > - 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, = 0xBB, 0xCE, 0xC6, 0xBD, > - 0xD5, 0xE2, 0xE8); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x81); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0C); > - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x03); > - mipi_dsi_dcs_write_seq(dsi, 0x03, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x03); > - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x03); > - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x03); > - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0x0A, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0x0B, 0x05); > - mipi_dsi_dcs_write_seq(dsi, 0x0C, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0x0D, 0x06); > - mipi_dsi_dcs_write_seq(dsi, 0x0E, 0x05); > - mipi_dsi_dcs_write_seq(dsi, 0x0F, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x10, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0x12, 0x05); > - mipi_dsi_dcs_write_seq(dsi, 0x13, 0x09); > - mipi_dsi_dcs_write_seq(dsi, 0x14, 0x05); > - mipi_dsi_dcs_write_seq(dsi, 0x15, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0x16, 0x06); > - mipi_dsi_dcs_write_seq(dsi, 0x17, 0x0B); > - mipi_dsi_dcs_write_seq(dsi, 0x18, 0x05); > - mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0C); > - mipi_dsi_dcs_write_seq(dsi, 0x1A, 0x06); > - mipi_dsi_dcs_write_seq(dsi, 0x1B, 0x0D); > - mipi_dsi_dcs_write_seq(dsi, 0x1C, 0x06); > - mipi_dsi_dcs_write_seq(dsi, 0x1D, 0x0E); > - mipi_dsi_dcs_write_seq(dsi, 0x1E, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x1F, 0x0F); > - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x06); > - mipi_dsi_dcs_write_seq(dsi, 0x21, 0x10); > - mipi_dsi_dcs_write_seq(dsi, 0x22, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x23, 0x11); > - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x12); > - mipi_dsi_dcs_write_seq(dsi, 0x26, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x13); > - mipi_dsi_dcs_write_seq(dsi, 0x28, 0x07); > - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x14); > - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x15); > - mipi_dsi_dcs_write_seq(dsi, 0x2C, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0x2D, 0x16); > - mipi_dsi_dcs_write_seq(dsi, 0x2E, 0x09); > - mipi_dsi_dcs_write_seq(dsi, 0x2F, 0x17); > - mipi_dsi_dcs_write_seq(dsi, 0x30, 0x08); > - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x18); > - mipi_dsi_dcs_write_seq(dsi, 0x32, 0x09); > - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x19); > - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x09); > - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x1A); > - mipi_dsi_dcs_write_seq(dsi, 0x36, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0x37, 0x1B); > - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x1C); > - mipi_dsi_dcs_write_seq(dsi, 0x3A, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0x3B, 0x1D); > - mipi_dsi_dcs_write_seq(dsi, 0x3C, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0x3D, 0x1E); > - mipi_dsi_dcs_write_seq(dsi, 0x3E, 0x0A); > - mipi_dsi_dcs_write_seq(dsi, 0x3F, 0x1F); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0xBA, 0x01); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0E); > - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x0C); > - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x10); > - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x16); > - mipi_dsi_dcs_write_seq(dsi, 0x26, 0xE0); > - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x71); > - mipi_dsi_dcs_write_seq(dsi, 0x2A, 0x46); > - mipi_dsi_dcs_write_seq(dsi, 0x2B, 0x1F); > - mipi_dsi_dcs_write_seq(dsi, 0x2D, 0xC7); > - mipi_dsi_dcs_write_seq(dsi, 0x31, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x32, 0xDF); > - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x5A); > - mipi_dsi_dcs_write_seq(dsi, 0x34, 0xC0); > - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x5A); > - mipi_dsi_dcs_write_seq(dsi, 0x36, 0xC0); > - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x65); > - mipi_dsi_dcs_write_seq(dsi, 0x80, 0x3E); > - mipi_dsi_dcs_write_seq(dsi, 0x81, 0xA0); > - mipi_dsi_dcs_write_seq(dsi, 0xB0, 0x01); > - mipi_dsi_dcs_write_seq(dsi, 0xB1, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC0, 0x12); > - mipi_dsi_dcs_write_seq(dsi, 0xC2, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC3, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC4, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC5, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC6, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC7, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC8, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0xC9, 0xCC); > - mipi_dsi_dcs_write_seq(dsi, 0x30, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x81); > - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x02); > - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x21); > - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x10); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x1E); > - mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x00); > - mipi_dsi_dcs_write_seq(dsi, 0x6D, 0x00); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x0B); > - mipi_dsi_dcs_write_seq(dsi, 0xA6, 0x44); > - mipi_dsi_dcs_write_seq(dsi, 0xA7, 0xB6); > - mipi_dsi_dcs_write_seq(dsi, 0xA8, 0x03); > - mipi_dsi_dcs_write_seq(dsi, 0xA9, 0x03); > - mipi_dsi_dcs_write_seq(dsi, 0xAA, 0x51); > - mipi_dsi_dcs_write_seq(dsi, 0xAB, 0x51); > - mipi_dsi_dcs_write_seq(dsi, 0xAC, 0x04); > - mipi_dsi_dcs_write_seq(dsi, 0xBD, 0x92); > - mipi_dsi_dcs_write_seq(dsi, 0xBE, 0xA1); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x05); > - mipi_dsi_dcs_write_seq(dsi, 0x86, 0x87); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x06); > - mipi_dsi_dcs_write_seq(dsi, 0x92, 0x22); > - > - mipi_dsi_dcs_write_seq(dsi, 0xFF, 0x98, 0x82, 0x00); > - > - ret =3D mipi_dsi_dcs_exit_sleep_mode(dsi); > - if (ret) > - return ret; > - msleep(120); > - ret =3D mipi_dsi_dcs_set_display_on(dsi); > - if (ret) > - return ret; > - msleep(20); > - > - return 0; > -}; > - > static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) > { > return container_of(panel, struct boe_panel, base); > @@ -2081,34 +1726,6 @@ static const struct panel_desc starry_himax83102_j= 02_desc =3D { > .lp11_before_reset =3D true, > }; > > -static const struct drm_display_mode starry_ili9882t_default_mode =3D { > - .clock =3D 165280, > - .hdisplay =3D 1200, > - .hsync_start =3D 1200 + 32, > - .hsync_end =3D 1200 + 32 + 30, > - .htotal =3D 1200 + 32 + 30 + 32, > - .vdisplay =3D 1920, > - .vsync_start =3D 1920 + 68, > - .vsync_end =3D 1920 + 68 + 2, > - .vtotal =3D 1920 + 68 + 2 + 10, > - .type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > -}; > - > -static const struct panel_desc starry_ili9882t_desc =3D { > - .modes =3D &starry_ili9882t_default_mode, > - .bpc =3D 8, > - .size =3D { > - .width_mm =3D 141, > - .height_mm =3D 226, > - }, > - .lanes =3D 4, > - .format =3D MIPI_DSI_FMT_RGB888, > - .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PU= LSE | > - MIPI_DSI_MODE_LPM, > - .init =3D starry_ili9882t_init, > - .lp11_before_reset =3D true, > -}; > - > static int boe_panel_get_modes(struct drm_panel *panel, > struct drm_connector *connector) > { > @@ -2285,9 +1902,6 @@ static const struct of_device_id boe_of_match[] =3D= { > { .compatible =3D "starry,himax83102-j02", > .data =3D &starry_himax83102_j02_desc > }, > - { .compatible =3D "starry,ili9882t", > - .data =3D &starry_ili9882t_desc > - }, > { /* sentinel */ } > }; > MODULE_DEVICE_TABLE(of, boe_of_match); > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/= drm/panel/panel-ilitek-ili9882t.c > new file mode 100644 > index 000000000000..20f3cc37fa83 > --- /dev/null > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c > @@ -0,0 +1,739 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Panels based on the Ilitek ILI9882T display controller. > + */ > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > + > +#include