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References: <cover.1690364259.git.haibo1.xu@intel.com> <36b5837e9e94465dd2b7d7a17bb84dea082f2ffa.1690364259.git.haibo1.xu@intel.com>
 <20230728-42019a78766a59dc5abdd412@orel>
In-Reply-To: <20230728-42019a78766a59dc5abdd412@orel>
From:   Haibo Xu <xiaobo55x@gmail.com>
Date:   Wed, 2 Aug 2023 10:02:07 +0800
Message-ID: <CAJve8omPWM7JR+Bqtemw0XjP8Q-C5zNbAzWxB_HMFcWKoSFuog@mail.gmail.com>
Subject: Re: [PATCH 3/4] KVM: riscv: selftests: Add guest helper to get vcpu id
To:     Andrew Jones <ajones@ventanamicro.com>
Cc:     Haibo Xu <haibo1.xu@intel.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Shuah Khan <shuah@kernel.org>,
        Anup Patel <anup@brainfault.org>,
        Atish Patra <atishp@atishpatra.org>,
        Sean Christopherson <seanjc@google.com>,
        Colton Lewis <coltonlewis@google.com>,
        Andrew Jones <andrew.jones@linux.dev>,
        Vipin Sharma <vipinsh@google.com>,
        Marc Zyngier <maz@kernel.org>,
        Vishal Annapurve <vannapurve@google.com>,
        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
        kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
        kvm-riscv@lists.infradead.org
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On Fri, Jul 28, 2023 at 5:49=E2=80=AFPM Andrew Jones <ajones@ventanamicro.c=
om> wrote:
>
> On Thu, Jul 27, 2023 at 03:20:07PM +0800, Haibo Xu wrote:
> > Add guest_get_vcpuid() helper to simplify accessing to per-cpu
> > private data. The sscratch CSR was used to store the vcpu id.
> >
> > Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> > ---
> >  tools/testing/selftests/kvm/include/riscv/processor.h | 2 ++
> >  tools/testing/selftests/kvm/lib/riscv/processor.c     | 8 ++++++++
> >  2 files changed, 10 insertions(+)
> >
> > diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/to=
ols/testing/selftests/kvm/include/riscv/processor.h
> > index 9ea6e7bedc61..ca53570ce6de 100644
> > --- a/tools/testing/selftests/kvm/include/riscv/processor.h
> > +++ b/tools/testing/selftests/kvm/include/riscv/processor.h
> > @@ -165,4 +165,6 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned =
long arg0,
> >                       unsigned long arg3, unsigned long arg4,
> >                       unsigned long arg5);
> >
> > +uint32_t guest_get_vcpuid(void);
>
> I'd also put this prototype somewhere common.
>
> > +
> >  #endif /* SELFTEST_KVM_PROCESSOR_H */
> > diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/=
testing/selftests/kvm/lib/riscv/processor.c
> > index f1b0be58a5dc..b8ad3e69a697 100644
> > --- a/tools/testing/selftests/kvm/lib/riscv/processor.c
> > +++ b/tools/testing/selftests/kvm/lib/riscv/processor.c
> > @@ -316,6 +316,9 @@ struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm=
, uint32_t vcpu_id,
> >       vcpu_set_reg(vcpu, RISCV_CORE_REG(regs.sp), stack_vaddr + stack_s=
ize);
> >       vcpu_set_reg(vcpu, RISCV_CORE_REG(regs.pc), (unsigned long)guest_=
code);
> >
> > +     /* Setup scratch regiter of guest */
>
> typo: register
>
> The comment above is pretty useless since it just states what the code
> states, but with even less information, since it doesn't state how the
> sscratch register is getting set up. I'd either drop it or write it
> as
>
>  /* Setup sscratch for guest_get_vcpuid() */
>
> > +     vcpu_set_reg(vcpu, RISCV_CSR_REG(sscratch), vcpu_id);
> > +
> >       /* Setup default exception vector of guest */
> >       vcpu_set_reg(vcpu, RISCV_CSR_REG(stvec), (unsigned long)guest_une=
xp_trap);
> >
> > @@ -424,3 +427,8 @@ void vm_install_interrupt_handler(struct kvm_vm *vm=
, void (*handler)(struct ex_r
> >
> >       handlers->exception_handlers[1][0] =3D handler;
> >  }
> > +
> > +uint32_t guest_get_vcpuid(void)
> > +{
> > +     return csr_read(CSR_SSCRATCH);
> > +}
> > --
> > 2.34.1
> >
>

Sure! will fix them in v2.

Thanks,
Haibo

> Thanks,
> drew