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Date:   Wed, 2 Aug 2023 08:22:10 +0100
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Yinbo Zhu <zhuyinbo@loongson.cn>
CC:     Conor Dooley <conor@kernel.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <brgl@bgdev.pl>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, Jianmin Lv <lvjianmin@loongson.cn>,
        <wanghongliang@loongson.cn>, Liu Peibao <liupeibao@loongson.cn>,
        <loongson-kernel@lists.loongnix.cn>
Subject: Re: [PATCH v2 1/2] gpio: dt-bindings: add parsing of loongson gpio
 offset
Message-ID: <20230802-jailer-pavilion-84fb17bb3710@wendy>
References: <20230731091059.17323-1-zhuyinbo@loongson.cn>
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On Wed, Aug 02, 2023 at 09:38:34AM +0800, Yinbo Zhu wrote:
>=20
>=20
> =E5=9C=A8 2023/8/1 =E4=B8=8B=E5=8D=8811:54, Conor Dooley =E5=86=99=E9=81=
=93:
> > On Tue, Aug 01, 2023 at 04:34:30PM +0800, Yinbo Zhu wrote:
> > >=20
> > >=20
> > > =E5=9C=A8 2023/8/1 =E4=B8=8B=E5=8D=883:23, Conor Dooley =E5=86=99=E9=
=81=93:
> > > > On Tue, Aug 01, 2023 at 02:39:49PM +0800, Yinbo Zhu wrote:
> > > > >=20
> > > > >=20
> > > > > =E5=9C=A8 2023/7/31 =E4=B8=8B=E5=8D=8811:55, Conor Dooley =E5=86=
=99=E9=81=93:
> > > > > > On Mon, Jul 31, 2023 at 05:10:58PM +0800, Yinbo Zhu wrote:
> > > > > > > Add parsing GPIO configure, input, output, interrupt register=
 offset
> > > > > > > address and GPIO control mode support.
> > > > > >=20
> > > > > > This reeks of insufficient use of SoC specific compatibles. Do =
GPIO
> > > > > > controllers on the same SoC have different register offsets?
> > > > >=20
> > > > >=20
> > > > > Yes,
> > > > >=20
> > > > > > Where are the users for this?
> > > > >=20
> > > > >=20
> > > > > For example, ls2k500 contains multiple GPIO chips with different
> > > > > (configure, input, output, interrupt) offset addresses, but all o=
thers
> > > > > are the same.
> > > >=20
> > > > Right. That's admittedly not what I expected to hear! Can you first=
ly
> > > > explain this in the commit message,
> > >=20
> > >=20
> > > I will add following explain in the commit message. Do you think it's
> > > suitable?
> > >=20
> > > Loongson GPIO controllers come in multiple variants that are compatib=
le
> > > except for certain register offset values.  Add support in yaml file =
for
> > > device properties allowing to specify them in DT.
> >=20
> > Sure, that would be helpful.
> >=20
> > > > and secondly add a soc-specific
> > > > compatible for the ls2k500 and only allow these properties on that =
SoC?
> >=20
> > > Sorry, I may not have described it clearly before, the ls2k500 was on=
ly
> > > as a example, actually, Loongson GPIO controllers (2k500,2k1000,eg)co=
me
> > > in multiple variants that are compatible except for certain register
> > > offset values.  So above all offset device property was used to in all
> > > loongson gpio controller.
> >=20
> > But it would be good to know why they are different. Do they each
> > support some different features, or was there some other reason for
> > making controllers like this?
>=20
>=20
> There are no other reasons, just differences in these offset addresses.

Huh. Do you have a link to a devicetree for the ls2k500?

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