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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a48cc4e4-41f5-4955-31fb-08db932c9b6f X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Aug 2023 07:46:39.8127 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: WvLaedf9tJlEuwcqDpBZLE7OtkEbL7r4BPW58ximGPdb4ZjPbedTxAqW/dsW7UsCY+bMNKN3J6S1qAV4Bk1v7A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB4957 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Liu, Yi L > Sent: Monday, July 24, 2023 7:14 PM >=20 > +static int intel_nested_cache_invalidate_user(struct iommu_domain > *domain, > + void *user_data) > +{ > + struct iommu_hwpt_vtd_s1_invalidate_desc *req =3D user_data; > + struct iommu_hwpt_vtd_s1_invalidate *inv_info =3D user_data; > + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); > + unsigned int entry_size =3D inv_info->entry_size; > + u64 uptr =3D inv_info->inv_data_uptr; > + u64 nr_uptr =3D inv_info->entry_nr_uptr; > + struct device_domain_info *info; > + u32 entry_nr, index; > + unsigned long flags; > + int ret =3D 0; > + > + if (get_user(entry_nr, (uint32_t __user *)u64_to_user_ptr(nr_uptr))) > + return -EFAULT; > + > + for (index =3D 0; index < entry_nr; index++) { > + ret =3D copy_struct_from_user(req, sizeof(*req), > + u64_to_user_ptr(uptr + index * > entry_size), > + entry_size); If continuing this direction then the driver should also check minsz etc. for struct iommu_hwpt_vtd_s1_invalidate and iommu_hwpt_vtd_s1_invalidate_de= sc since they are uAPI and subject to change. > + if (ret) { > + pr_err_ratelimited("Failed to fetch invalidation > request\n"); > + break; > + } > + > + if (req->__reserved || (req->flags & > ~IOMMU_VTD_QI_FLAGS_LEAF) || > + !IS_ALIGNED(req->addr, VTD_PAGE_SIZE)) { > + ret =3D -EINVAL; > + break; > + } > + > + spin_lock_irqsave(&dmar_domain->lock, flags); > + list_for_each_entry(info, &dmar_domain->devices, link) > + intel_nested_invalidate(info->dev, dmar_domain, > + req->addr, req->npages); > + spin_unlock_irqrestore(&dmar_domain->lock, flags); Disabling interrupt while invalidating iotlb is certainly unacceptable. Actually there is no need to walk devices. Under dmar_domain there is already a list of attached iommu's.=20