From: Andi Kleen <ak@suse.de>
Organization: SUSE Linux Products GmbH, Nuernberg, GF: Markus Rex, HRB 16746 (AG Nuernberg)
To: Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch
Date: Tue, 30 Oct 2007 19:50:58 +0100
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       Jesse Barnes <jbarnes@virtuousgeek.org>, akpm@linux-foundation.org,
       rajesh.shah@intel.com, linux-kernel <linux-kernel@vger.kernel.org>
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> At that point, almost all the issues with mmconfig just go away, BECAUSE 
> NOBODY USES IT, so it doesn't matter if it's broken?

We seem to slowly grow more uses of registers > 256, but yes it's still mostly 
non critical stuff.
 
> The fact is, CONF1 style accesses are just safer, and *work*. 
> 
> Can we please just do that? 

At least for the AMD GART IOMMU I would prefer if that was not done.
It has a pci config space access in a time critical path (flush).
And Family10h supports accessing the northbridge using mmconfig.

I believe the tigon3 driver also does config space access frequently
on some chips.

Also there are still the old x86 Macs where conf1 doesn't work.

-Andi
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