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Rozycki" , Marek =?iso-8859-1?Q?Beh=FAn?= Subject: Re: [PATCH v1 8/9] PCI: PLDA: starfive: Add JH7110 PCIe controller Message-ID: <20230802171409.GA62497@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20230801071453.afaulygpczpyhopk@pali> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 01, 2023 at 09:14:53AM +0200, Pali Roh?r wrote: > On Tuesday 01 August 2023 15:05:46 Kevin Xie wrote: > > On 2023/8/1 7:12, Bjorn Helgaas wrote: > > ... > > That's the point, we will add a extra 100ms after PERST# de-assert > > in the patch-v3 according to Base Spec r6.0 - 6.6.1: > > msleep(100); > > gpiod_set_value_cansleep(pcie->reset_gpio, 0); > > > > + /* As the requirement in PCIe base spec r6.0, system must wait a > > + * minimum of 100 ms following exit from a Conventional Reset > > + * before sending a Configuration Request to the device.*/ > > + msleep(100); > > + > > if (starfive_pcie_host_wait_for_link(pcie)) > > return -EIO; > > Maybe this information can be useful here: > https://lore.kernel.org/linux-pci/20211022183808.jdeo7vntnagqkg7g@pali/ Yes, thank you! That is a great summary!