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[2620:137:e000::1:20]) by mx.google.com with ESMTP id eh10-20020a056a00808a00b0068255c2b8a8si6818045pfb.151.2023.08.02.12.15.15; Wed, 02 Aug 2023 12:15:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=q3jHnB58; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232013AbjHBStN (ORCPT + 99 others); Wed, 2 Aug 2023 14:49:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231720AbjHBStL (ORCPT ); Wed, 2 Aug 2023 14:49:11 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62B7226A1; Wed, 2 Aug 2023 11:49:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8A04961AB0; Wed, 2 Aug 2023 18:49:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3DF6DC433C8; Wed, 2 Aug 2023 18:49:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691002143; bh=/DSGNuWAHxe5PRcoeTdd6CJ72uKg2Br00NWX58ambS8=; h=From:To:Cc:Subject:Date:From; b=q3jHnB58ExvBojMqVxDiCvD8pYO/bErzabRTPdZKe5rwURUJvSve/VRd2Ge2H9slT Ni3TsS5fZayhRKjkaryD3prPzVml9fcJb0UpVdtaV7KN5uf5sjFkF3eq85VAcknMjY v8HPhs5EdPylL0MnaO02n16j33Ov3XHDvf64hrFSiKWB4BLWERtl22aZSdaLNQDB6l QnVy/+kKfHRofr3xl9pRZ6cy+0AZR1K339/RbljnHoVFUaSkcluxgwqF5sKDfsiSXl +23xXyOz/fVhshbIsx4xLE9Cn+koBKgjM7KF1QEQdQgML18j/FpXKiK6/O7gXd5W5a nZhC7WMHF6CyA== From: Arnd Bergmann To: John Paul Adrian Glaubitz Cc: linux-sh@vger.kernel.org, Rich Felker , Yoshinori Sato , Geert Uytterhoeven , linux-kernel@vger.kernel.org, Arnd Bergmann Subject: [PATCH 1/4] sh: remove stale microdev board Date: Wed, 2 Aug 2023 20:48:46 +0200 Message-Id: <20230802184849.1019466-1-arnd@kernel.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Arnd Bergmann This board was an early prototype platform for early SH4 CPUs and related to the already removed SH5 cayman platform. The microdev board itself has been kept in the tree for this long despite being in a bad shape even 20 years ago when it got merged, with no working PCI support and ugly workarounds for its I/O port implementation that try to emulate PC style peripheral access despite being quite different in reality. As far as I can tell, the ethernet, display, USB and PCI devices on it already broke at some point (afbb9d8d5266b, 46bc85872040a), so I think we can just remove it entirely. Link: https://lore.kernel.org/lkml/09094baf-dadf-4bce-9f63-f2a1f255f9a8@app.fastmail.com/ Signed-off-by: Arnd Bergmann --- arch/sh/Kconfig | 3 +- arch/sh/boards/Kconfig | 7 - arch/sh/boards/Makefile | 1 - arch/sh/boards/mach-microdev/Makefile | 6 - arch/sh/boards/mach-microdev/fdc37c93xapm.c | 157 ---------------- arch/sh/boards/mach-microdev/io.c | 123 ------------ arch/sh/boards/mach-microdev/irq.c | 150 --------------- arch/sh/boards/mach-microdev/setup.c | 197 -------------------- arch/sh/configs/microdev_defconfig | 42 ----- arch/sh/include/mach-common/mach/microdev.h | 69 ------- drivers/net/ethernet/smsc/smc91x.h | 19 -- 11 files changed, 1 insertion(+), 773 deletions(-) delete mode 100644 arch/sh/boards/mach-microdev/Makefile delete mode 100644 arch/sh/boards/mach-microdev/fdc37c93xapm.c delete mode 100644 arch/sh/boards/mach-microdev/io.c delete mode 100644 arch/sh/boards/mach-microdev/irq.c delete mode 100644 arch/sh/boards/mach-microdev/setup.c delete mode 100644 arch/sh/configs/microdev_defconfig delete mode 100644 arch/sh/include/mach-common/mach/microdev.h diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 33530b044953c..d3df67f215ca5 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -124,8 +124,7 @@ config ARCH_HAS_ILOG2_U64 config NO_IOPORT_MAP def_bool !PCI - depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \ - !SH_SOLUTION_ENGINE + depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE config IO_TRAPPED bool diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index fafe15d3ba1dc..109bec4dad94a 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -289,13 +289,6 @@ config SH_EDOSK7760 Select if configuring for a Renesas EDOSK7760 evaluation board. -config SH_SH4202_MICRODEV - bool "SH4-202 MicroDev" - depends on CPU_SUBTYPE_SH4_202 - help - Select SH4-202 MicroDev if configuring for a SuperH MicroDev board - with an SH4-202 CPU. - config SH_LANDISK bool "LANDISK" depends on CPU_SUBTYPE_SH7751R diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile index b57219436ace3..fbbc350ca8542 100644 --- a/arch/sh/boards/Makefile +++ b/arch/sh/boards/Makefile @@ -33,7 +33,6 @@ obj-$(CONFIG_SH_SDK7780) += mach-sdk7780/ obj-$(CONFIG_SH_SDK7786) += mach-sdk7786/ obj-$(CONFIG_SH_X3PROTO) += mach-x3proto/ obj-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp/ -obj-$(CONFIG_SH_SH4202_MICRODEV)+= mach-microdev/ obj-$(CONFIG_SH_LANDISK) += mach-landisk/ obj-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2/ obj-$(CONFIG_SH_RSK) += mach-rsk/ diff --git a/arch/sh/boards/mach-microdev/Makefile b/arch/sh/boards/mach-microdev/Makefile deleted file mode 100644 index 05c5698dcad02..0000000000000 --- a/arch/sh/boards/mach-microdev/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Makefile for the SuperH MicroDev specific parts of the kernel -# - -obj-y := setup.o irq.o io.o fdc37c93xapm.o diff --git a/arch/sh/boards/mach-microdev/fdc37c93xapm.c b/arch/sh/boards/mach-microdev/fdc37c93xapm.c deleted file mode 100644 index 2a04f72dd1457..0000000000000 --- a/arch/sh/boards/mach-microdev/fdc37c93xapm.c +++ /dev/null @@ -1,157 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Setup for the SMSC FDC37C93xAPM - * - * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) - * Copyright (C) 2003, 2004 SuperH, Inc. - * Copyright (C) 2004, 2005 Paul Mundt - * - * SuperH SH4-202 MicroDev board support. - */ -#include -#include -#include -#include -#include - -#define SMSC_CONFIG_PORT_ADDR (0x3F0) -#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR -#define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1) - -#define SMSC_ENTER_CONFIG_KEY 0x55 -#define SMSC_EXIT_CONFIG_KEY 0xaa - -#define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */ -#define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */ -#define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */ -#define SMSC_ACTIVATE_INDEX 0x30 /* Activate */ -#define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */ -#define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */ -#define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */ -#define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */ -#define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */ -#define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */ - -#define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */ -#define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */ -#define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */ -#define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */ -#define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */ -#define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */ -#define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */ - -#define SMSC_READ_INDEXED(index) ({ \ - outb((index), SMSC_INDEX_PORT_ADDR); \ - inb(SMSC_DATA_PORT_ADDR); }) -#define SMSC_WRITE_INDEXED(val, index) ({ \ - outb((index), SMSC_INDEX_PORT_ADDR); \ - outb((val), SMSC_DATA_PORT_ADDR); }) - -#define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */ -#define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */ -#define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */ -#define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */ - -#define SERIAL1_PRIMARY_BASE 0x03f8 -#define SERIAL2_PRIMARY_BASE 0x02f8 - -#define MSB(x) ( (x) >> 8 ) -#define LSB(x) ( (x) & 0xff ) - - /* General-Purpose base address on CPU-board FPGA */ -#define MICRODEV_FPGA_GP_BASE 0xa6100000ul - -static int __init smsc_superio_setup(void) -{ - - unsigned char devid, devrev; - - /* Initially the chip is in run state */ - /* Put it into configuration state */ - outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - - /* Read device ID info */ - devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX); - devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX); - - if ((devid == 0x30) && (devrev == 0x01)) - printk("SMSC FDC37C93xAPM SuperIO device detected\n"); - else - return -ENODEV; - - /* Select the keyboard device */ - SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); - /* enable it */ - SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - /* enable the interrupts */ - SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX); - SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX); - - /* Select the Serial #1 device */ - SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX); - /* enable it */ - SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - /* program with port addresses */ - SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); - SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); - SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX); - /* enable the interrupts */ - SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX); - - /* Select the Serial #2 device */ - SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX); - /* enable it */ - SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - /* program with port addresses */ - SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); - SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); - SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX); - /* enable the interrupts */ - SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX); - - /* Select the IDE#1 device */ - SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); - /* enable it */ - SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - /* program with port addresses */ - SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); - SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); - SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); - SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1); - SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX); - SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX); - /* select the interrupt */ - SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX); - - /* Select the IDE#2 device */ - SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX); - /* enable it */ - SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - /* program with port addresses */ - SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0); - SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1); - SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0); - SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1); - /* select the interrupt */ - SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX); - - /* Select the configuration registers */ - SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX); - /* enable the appropriate GPIO pins for IDE functionality: - * bit[0] In/Out 1==input; 0==output - * bit[1] Polarity 1==invert; 0==no invert - * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable - * bit[3:4] Function Select 00==original; 01==Alternate Function #1 - */ - SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ - SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ - SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ - SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ - SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */ - - /* Exit the configuration state */ - outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - - return 0; -} -device_initcall(smsc_superio_setup); diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c deleted file mode 100644 index a76c12721e63d..0000000000000 --- a/arch/sh/boards/mach-microdev/io.c +++ /dev/null @@ -1,123 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * linux/arch/sh/boards/superh/microdev/io.c - * - * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) - * Copyright (C) 2003, 2004 SuperH, Inc. - * Copyright (C) 2004 Paul Mundt - * - * SuperH SH4-202 MicroDev board support. - */ - -#include -#include -#include -#include -#include - - /* - * we need to have a 'safe' address to re-direct all I/O requests - * that we do not explicitly wish to handle. This safe address - * must have the following properies: - * - * * writes are ignored (no exception) - * * reads are benign (no side-effects) - * * accesses of width 1, 2 and 4-bytes are all valid. - * - * The Processor Version Register (PVR) has these properties. - */ -#define PVR 0xff000030 /* Processor Version Register */ - - -#define IO_IDE2_BASE 0x170ul /* I/O base for SMSC FDC37C93xAPM IDE #2 */ -#define IO_IDE1_BASE 0x1f0ul /* I/O base for SMSC FDC37C93xAPM IDE #1 */ -#define IO_ISP1161_BASE 0x290ul /* I/O port for Philips ISP1161x USB chip */ -#define IO_SERIAL2_BASE 0x2f8ul /* I/O base for SMSC FDC37C93xAPM Serial #2 */ -#define IO_LAN91C111_BASE 0x300ul /* I/O base for SMSC LAN91C111 Ethernet chip */ -#define IO_IDE2_MISC 0x376ul /* I/O misc for SMSC FDC37C93xAPM IDE #2 */ -#define IO_SUPERIO_BASE 0x3f0ul /* I/O base for SMSC FDC37C93xAPM SuperIO chip */ -#define IO_IDE1_MISC 0x3f6ul /* I/O misc for SMSC FDC37C93xAPM IDE #1 */ -#define IO_SERIAL1_BASE 0x3f8ul /* I/O base for SMSC FDC37C93xAPM Serial #1 */ - -#define IO_ISP1161_EXTENT 0x04ul /* I/O extent for Philips ISP1161x USB chip */ -#define IO_LAN91C111_EXTENT 0x10ul /* I/O extent for SMSC LAN91C111 Ethernet chip */ -#define IO_SUPERIO_EXTENT 0x02ul /* I/O extent for SMSC FDC37C93xAPM SuperIO chip */ -#define IO_IDE_EXTENT 0x08ul /* I/O extent for IDE Task Register set */ -#define IO_SERIAL_EXTENT 0x10ul - -#define IO_LAN91C111_PHYS 0xa7500000ul /* Physical address of SMSC LAN91C111 Ethernet chip */ -#define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */ -#define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */ - -/* - * map I/O ports to memory-mapped addresses - */ -void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len) -{ - unsigned long result; - - if ((offset >= IO_LAN91C111_BASE) && - (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { - /* - * SMSC LAN91C111 Ethernet chip - */ - result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE; - } else if ((offset >= IO_SUPERIO_BASE) && - (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) { - /* - * SMSC FDC37C93xAPM SuperIO chip - * - * Configuration Registers - */ - result = IO_SUPERIO_PHYS + (offset << 1); - } else if (((offset >= IO_IDE1_BASE) && - (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || - (offset == IO_IDE1_MISC)) { - /* - * SMSC FDC37C93xAPM SuperIO chip - * - * IDE #1 - */ - result = IO_SUPERIO_PHYS + (offset << 1); - } else if (((offset >= IO_IDE2_BASE) && - (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) || - (offset == IO_IDE2_MISC)) { - /* - * SMSC FDC37C93xAPM SuperIO chip - * - * IDE #2 - */ - result = IO_SUPERIO_PHYS + (offset << 1); - } else if ((offset >= IO_SERIAL1_BASE) && - (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) { - /* - * SMSC FDC37C93xAPM SuperIO chip - * - * Serial #1 - */ - result = IO_SUPERIO_PHYS + (offset << 1); - } else if ((offset >= IO_SERIAL2_BASE) && - (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) { - /* - * SMSC FDC37C93xAPM SuperIO chip - * - * Serial #2 - */ - result = IO_SUPERIO_PHYS + (offset << 1); - } else if ((offset >= IO_ISP1161_BASE) && - (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) { - /* - * Philips USB ISP1161x chip - */ - result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE; - } else { - /* - * safe default. - */ - printk("Warning: unexpected port in %s( offset = 0x%lx )\n", - __func__, offset); - result = PVR; - } - - return (void __iomem *)result; -} diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c deleted file mode 100644 index dc27492c83d76..0000000000000 --- a/arch/sh/boards/mach-microdev/irq.c +++ /dev/null @@ -1,150 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * arch/sh/boards/superh/microdev/irq.c - * - * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) - * - * SuperH SH4-202 MicroDev board support. - */ - -#include -#include -#include -#include -#include - -#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */ - -static const struct { - unsigned char fpgaIrq; - unsigned char mapped; - const char *name; -} fpgaIrqTable[NUM_EXTERNAL_IRQS] = { - { 0, 0, "unused" }, /* IRQ #0 IRL=15 0x200 */ - { MICRODEV_FPGA_IRQ_KEYBOARD, 1, "keyboard" }, /* IRQ #1 IRL=14 0x220 */ - { MICRODEV_FPGA_IRQ_SERIAL1, 1, "Serial #1"}, /* IRQ #2 IRL=13 0x240 */ - { MICRODEV_FPGA_IRQ_ETHERNET, 1, "Ethernet" }, /* IRQ #3 IRL=12 0x260 */ - { MICRODEV_FPGA_IRQ_SERIAL2, 0, "Serial #2"}, /* IRQ #4 IRL=11 0x280 */ - { 0, 0, "unused" }, /* IRQ #5 IRL=10 0x2a0 */ - { 0, 0, "unused" }, /* IRQ #6 IRL=9 0x2c0 */ - { MICRODEV_FPGA_IRQ_USB_HC, 1, "USB" }, /* IRQ #7 IRL=8 0x2e0 */ - { MICRODEV_IRQ_PCI_INTA, 1, "PCI INTA" }, /* IRQ #8 IRL=7 0x300 */ - { MICRODEV_IRQ_PCI_INTB, 1, "PCI INTB" }, /* IRQ #9 IRL=6 0x320 */ - { MICRODEV_IRQ_PCI_INTC, 1, "PCI INTC" }, /* IRQ #10 IRL=5 0x340 */ - { MICRODEV_IRQ_PCI_INTD, 1, "PCI INTD" }, /* IRQ #11 IRL=4 0x360 */ - { MICRODEV_FPGA_IRQ_MOUSE, 1, "mouse" }, /* IRQ #12 IRL=3 0x380 */ - { MICRODEV_FPGA_IRQ_IDE2, 1, "IDE #2" }, /* IRQ #13 IRL=2 0x3a0 */ - { MICRODEV_FPGA_IRQ_IDE1, 1, "IDE #1" }, /* IRQ #14 IRL=1 0x3c0 */ - { 0, 0, "unused" }, /* IRQ #15 IRL=0 0x3e0 */ -}; - -#if (MICRODEV_LINUX_IRQ_KEYBOARD != 1) -# error Inconsistancy in defining the IRQ# for Keyboard! -#endif - -#if (MICRODEV_LINUX_IRQ_ETHERNET != 3) -# error Inconsistancy in defining the IRQ# for Ethernet! -#endif - -#if (MICRODEV_LINUX_IRQ_USB_HC != 7) -# error Inconsistancy in defining the IRQ# for USB! -#endif - -#if (MICRODEV_LINUX_IRQ_MOUSE != 12) -# error Inconsistancy in defining the IRQ# for PS/2 Mouse! -#endif - -#if (MICRODEV_LINUX_IRQ_IDE2 != 13) -# error Inconsistancy in defining the IRQ# for secondary IDE! -#endif - -#if (MICRODEV_LINUX_IRQ_IDE1 != 14) -# error Inconsistancy in defining the IRQ# for primary IDE! -#endif - -static void disable_microdev_irq(struct irq_data *data) -{ - unsigned int irq = data->irq; - unsigned int fpgaIrq; - - if (irq >= NUM_EXTERNAL_IRQS) - return; - if (!fpgaIrqTable[irq].mapped) - return; - - fpgaIrq = fpgaIrqTable[irq].fpgaIrq; - - /* disable interrupts on the FPGA INTC register */ - __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); -} - -static void enable_microdev_irq(struct irq_data *data) -{ - unsigned int irq = data->irq; - unsigned long priorityReg, priorities, pri; - unsigned int fpgaIrq; - - if (unlikely(irq >= NUM_EXTERNAL_IRQS)) - return; - if (unlikely(!fpgaIrqTable[irq].mapped)) - return; - - pri = 15 - irq; - - fpgaIrq = fpgaIrqTable[irq].fpgaIrq; - priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); - - /* set priority for the interrupt */ - priorities = __raw_readl(priorityReg); - priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); - priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); - __raw_writel(priorities, priorityReg); - - /* enable interrupts on the FPGA INTC register */ - __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); -} - -static struct irq_chip microdev_irq_type = { - .name = "MicroDev-IRQ", - .irq_unmask = enable_microdev_irq, - .irq_mask = disable_microdev_irq, -}; - -/* This function sets the desired irq handler to be a MicroDev type */ -static void __init make_microdev_irq(unsigned int irq) -{ - disable_irq_nosync(irq); - irq_set_chip_and_handler(irq, µdev_irq_type, handle_level_irq); - disable_microdev_irq(irq_get_irq_data(irq)); -} - -extern void __init init_microdev_irq(void) -{ - int i; - - /* disable interrupts on the FPGA INTC register */ - __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG); - - for (i = 0; i < NUM_EXTERNAL_IRQS; i++) - make_microdev_irq(i); -} - -extern void microdev_print_fpga_intc_status(void) -{ - volatile unsigned int * const intenb = (unsigned int*)MICRODEV_FPGA_INTENB_REG; - volatile unsigned int * const intdsb = (unsigned int*)MICRODEV_FPGA_INTDSB_REG; - volatile unsigned int * const intpria = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(0); - volatile unsigned int * const intprib = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(8); - volatile unsigned int * const intpric = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(16); - volatile unsigned int * const intprid = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(24); - volatile unsigned int * const intsrc = (unsigned int*)MICRODEV_FPGA_INTSRC_REG; - volatile unsigned int * const intreq = (unsigned int*)MICRODEV_FPGA_INTREQ_REG; - - printk("-------------------------- microdev_print_fpga_intc_status() ------------------\n"); - printk("FPGA_INTENB = 0x%08x\n", *intenb); - printk("FPGA_INTDSB = 0x%08x\n", *intdsb); - printk("FPGA_INTSRC = 0x%08x\n", *intsrc); - printk("FPGA_INTREQ = 0x%08x\n", *intreq); - printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria); - printk("-------------------------------------------------------------------------------\n"); -} diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c deleted file mode 100644 index ee55eb2b4d791..0000000000000 --- a/arch/sh/boards/mach-microdev/setup.c +++ /dev/null @@ -1,197 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * arch/sh/boards/superh/microdev/setup.c - * - * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) - * Copyright (C) 2003, 2004 SuperH, Inc. - * Copyright (C) 2004, 2005 Paul Mundt - * - * SuperH SH4-202 MicroDev board support. - */ -#include -#include -#include -#include