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From:   Raghavendra Rao Ananta <rananta@google.com>
Date:   Wed, 2 Aug 2023 16:33:48 -0700
Message-ID: <CAJHc60ww4X89SU+ttddjZUjOFS+D_s9Z+2xE1WaVCR-w7hEF9g@mail.gmail.com>
Subject: Re: [PATCH v7 12/12] KVM: arm64: Use TLBI range-based intructions for unmap
To:     Marc Zyngier <maz@kernel.org>
Cc:     Oliver Upton <oliver.upton@linux.dev>,
        James Morse <james.morse@arm.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Sean Christopherson <seanjc@google.com>,
        Huacai Chen <chenhuacai@kernel.org>,
        Zenghui Yu <yuzenghui@huawei.com>,
        Anup Patel <anup@brainfault.org>,
        Atish Patra <atishp@atishpatra.org>,
        Jing Zhang <jingzhangos@google.com>,
        Reiji Watanabe <reijiw@google.com>,
        Colton Lewis <coltonlewis@google.com>,
        David Matlack <dmatlack@google.com>,
        linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
        linux-mips@vger.kernel.org, kvm-riscv@lists.infradead.org,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org
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On Wed, Aug 2, 2023 at 4:28=E2=80=AFPM Marc Zyngier <maz@kernel.org> wrote:
>
> On Mon, 31 Jul 2023 19:26:09 +0100,
> Raghavendra Rao Ananta <rananta@google.com> wrote:
> >
> > On Thu, Jul 27, 2023 at 6:12=E2=80=AFAM Marc Zyngier <maz@kernel.org> w=
rote:
> > >
> > > On Sat, 22 Jul 2023 03:22:51 +0100,
> > > Raghavendra Rao Ananta <rananta@google.com> wrote:
> > > >
> > > > The current implementation of the stage-2 unmap walker traverses
> > > > the given range and, as a part of break-before-make, performs
> > > > TLB invalidations with a DSB for every PTE. A multitude of this
> > > > combination could cause a performance bottleneck on some systems.
> > > >
> > > > Hence, if the system supports FEAT_TLBIRANGE, defer the TLB
> > > > invalidations until the entire walk is finished, and then
> > > > use range-based instructions to invalidate the TLBs in one go.
> > > > Condition deferred TLB invalidation on the system supporting FWB,
> > > > as the optimization is entirely pointless when the unmap walker
> > > > needs to perform CMOs.
> > > >
> > > > Rename stage2_put_pte() to stage2_unmap_put_pte() as the function
> > > > now serves the stage-2 unmap walker specifically, rather than
> > > > acting generic.
> > > >
> > > > Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> > > > ---
> > > >  arch/arm64/kvm/hyp/pgtable.c | 67 +++++++++++++++++++++++++++++++-=
----
> > > >  1 file changed, 58 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgta=
ble.c
> > > > index 5ef098af1736..cf88933a2ea0 100644
> > > > --- a/arch/arm64/kvm/hyp/pgtable.c
> > > > +++ b/arch/arm64/kvm/hyp/pgtable.c
> > > > @@ -831,16 +831,54 @@ static void stage2_make_pte(const struct kvm_=
pgtable_visit_ctx *ctx, kvm_pte_t n
> > > >       smp_store_release(ctx->ptep, new);
> > > >  }
> > > >
> > > > -static void stage2_put_pte(const struct kvm_pgtable_visit_ctx *ctx=
, struct kvm_s2_mmu *mmu,
> > > > -                        struct kvm_pgtable_mm_ops *mm_ops)
> > > > +struct stage2_unmap_data {
> > > > +     struct kvm_pgtable *pgt;
> > > > +     bool defer_tlb_flush_init;
> > > > +};
> > > > +
> > > > +static bool __stage2_unmap_defer_tlb_flush(struct kvm_pgtable *pgt=
)
> > > > +{
> > > > +     /*
> > > > +      * If FEAT_TLBIRANGE is implemented, defer the individual
> > > > +      * TLB invalidations until the entire walk is finished, and
> > > > +      * then use the range-based TLBI instructions to do the
> > > > +      * invalidations. Condition deferred TLB invalidation on the
> > > > +      * system supporting FWB, as the optimization is entirely
> > > > +      * pointless when the unmap walker needs to perform CMOs.
> > > > +      */
> > > > +     return system_supports_tlb_range() && stage2_has_fwb(pgt);
> > > > +}
> > > > +
> > > > +static bool stage2_unmap_defer_tlb_flush(struct stage2_unmap_data =
*unmap_data)
> > > > +{
> > > > +     bool defer_tlb_flush =3D __stage2_unmap_defer_tlb_flush(unmap=
_data->pgt);
> > > > +
> > > > +     /*
> > > > +      * Since __stage2_unmap_defer_tlb_flush() is based on alterna=
tive
> > > > +      * patching and the TLBIs' operations behavior depend on this=
,
> > > > +      * track if there's any change in the state during the unmap =
sequence.
> > > > +      */
> > > > +     WARN_ON(unmap_data->defer_tlb_flush_init !=3D defer_tlb_flush=
);
> > > > +     return defer_tlb_flush;
> > >
> > > I really don't understand what you're testing here. The ability to
> > > defer TLB invalidation is a function of the system capabilities
> > > (range+FWB) and a single flag that is only set on the host for pKVM.
> > >
> > > How could that change in the middle of the life of the system? if
> > > further begs the question about the need for the unmap_data data
> > > structure.
> > >
> > > It looks to me that we could simply pass the pgt pointer around and b=
e
> > > done with it. Am I missing something obvious?
> > >
> > From one of the previous comments [1] (used in a different context),
> > I'm given to understand that since these feature checks are governed
> > by alternative patching, they can potentially change (at runtime?). Is
> > that not the case and I have misunderstood the idea in comment [1]
> > entirely? Is it solely used for optimization purposes and set only
> > once?
>
> Alternative patching, just like the static branches used to implement
> the capability stuff, is a one way street. At the point where KVM is
> initialised, these configurations are set in stone, and there is no
> going back.
>
Understood.
> > If that's the case, I can get rid of the WARN_ON() and unmap_data.
>
> yes, please.
>
Sure, I'll get rid of the WARN_ON and 'struct stage2_unmap_data' in v8.

Thanks,
Raghavendra
> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.