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Wysocki" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sudeep Holla , Quentin Perret , Masami Hiramatsu , Will Deacon , Peter Zijlstra , Vincent Guittot , Marc Zyngier , Oliver Upton , Dietmar Eggemann , Pavan Kondeti , Gupta Pankaj , Mel Gorman , kernel-team@android.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 2/2] cpufreq: add virtual-cpufreq driver Message-ID: <20230803055157.6buxd5lcxjo4wrbk@vireshk-i7> References: <20230731174613.4133167-1-davidai@google.com> <20230731174613.4133167-3-davidai@google.com> <20230801093620.ggz25g3faxycp44q@vireshk-i7> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02-08-23, 15:16, Saravana Kannan wrote: > This is mainly an optimization to reduce the latency of the "frequency > change" which has a huge impact on the performance (as can be seen > from the numbers in the cover letter). > > Setting this flag means that the vCPU thread triggering the MMIO > handling (on the host side) is the thread on which the host needs to > apply any uclamp settings. So this avoids the VMM having to look up > the right vCPU thread that corresponds to this CPU, and any > permissions issues wrt setting another threads uclamp, etc. This > becomes even more important if/when BPF support is added for handling > simple MMIO read/writes. Will Deacon has been working on the eBPF > part[1] and IIUC, not setting this flag adds a lot of extra overhead > on the BPF side. > > So, yeah, this flag is very helpful wrt reducing latency/simplifying > host side implementation and that's why we want it here. > > [1] - https://kvm-forum.qemu.org/2023/talk/AZKC77/ Would be good to have a (big) comment in the code explaining that as it isn't obvious. Thanks. -- viresh