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[82.149.1.233]) by smtp.gmail.com with ESMTPSA id s11-20020adff80b000000b003179d5aee63sm752635wrp.91.2023.08.03.14.07.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 14:07:56 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Andre Przywara Cc: Icenowy Zheng , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/3] sunxi: Orange Pi Zero 3 DT support Date: Thu, 03 Aug 2023 23:07:55 +0200 Message-ID: <3751904.kQq0lBPeGt@jernej-laptop> In-Reply-To: <20230731011725.7228-1-andre.przywara@arm.com> References: <20230731011725.7228-1-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dne ponedeljek, 31. julij 2023 ob 03:17:22 CEST je Andre Przywara napisal(a): > Hi, > > Orange Pi recently released the Orange Pi Zero 3 board, which is some > updated version of their former Zero 2 development board. Some component > changes (Motorcomm PHY instead of Realtek, different PMIC), some board > layout changes, and it ships with up to 4GB of DRAM now. The SoC is now > labelled H618 instead of H616, which apparently is the same, just with > more L2 cache. > > Split the existing OPi Zero2 DT, to allow sharing most DT nodes, then > add the binding documentation and DT for the new board. > > Linux v6.5-rc boots out of the box (the PMIC driver just made it in), > and most things work: UART, PSCI, GPIO, SPI flash, SD card, USB. > Ethernet is almost working, I get an IP address via DHCP, but no further > packets come through. Might be either a problem with the new Motorcomm > PHY driver, or some missing delay settings, I have to investigate, any > help or advice welcome. When I worked with Motorcomm PHYs, I had to add motorcomm,clk-out-frequency-hz = <125000000>; and usual reset gpio related properties. Have you tried that? In any case, it's not 100% reliable, but I don't know why. Best regards, Jernej > Also let me know if the DT split is a good idea or not, happy to roll > that back if requested. > > Cheers, > Andre > > Andre Przywara (3): > arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT > dt-bindings: arm: sunxi: document Orange Pi Zero 3 board name > arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support > > .../devicetree/bindings/arm/sunxi.yaml | 5 + > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../allwinner/sun50i-h616-orangepi-zero2.dts | 119 +--------------- > .../allwinner/sun50i-h616-orangepi-zerox.dtsi | 131 ++++++++++++++++++ > .../allwinner/sun50i-h618-orangepi-zero3.dts | 86 ++++++++++++ > 5 files changed, 224 insertions(+), 118 deletions(-) > create mode 100644 > arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zerox.dtsi create mode > 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts