Received: by 2002:a05:6358:700f:b0:131:369:b2a3 with SMTP id 15csp3241684rwo; Fri, 4 Aug 2023 01:27:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IErjcihopb9e1tyL8Go2Mr6H63wMEeXFr4cLVaoz5Rfd9sj9SAljBhT3NrHcdbnTw1oQAem X-Received: by 2002:a17:906:2097:b0:988:9621:d855 with SMTP id 23-20020a170906209700b009889621d855mr1023550ejq.61.1691137640853; Fri, 04 Aug 2023 01:27:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691137640; cv=none; d=google.com; s=arc-20160816; b=iFmufhIQbuqqM/dGoqRK2zDfRltwE7BEngH4cfz1feIdRIMGrDF6w8Myaos/rcuuzl 9mHhwpTvtfnGBBl36msWMKy2Jb2bk1vzoZEw28iFML6QWU18HJr5SSbhl0e0LUklJTQx 3U8L0loDokH3KehQGdteH9iX8sZWDyT5UNfQMd3MV5uUFoHemsmImud4GchgD7uzh6mp rmfiWE2JUXe5lw2T40RFhNMODwuqDV/2UPifg5F+Hy080mqIH7LRrS/DqEvFRKY3+67h 4BiVxPL0OuUuNiC3YRITZHjsfIoqIV7dFipJ8g21HSL5eu+MQHdfG6P3BAYIy4cCl4jh d6/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DuT5+JoXH2HL2TlvQsZt8Ht8tQqDvp9g/pL3+hiYlvk=; fh=wVZEQimxp/UyE4Mf0Sn+nsZcfrBLHvkvU7kacOC/59o=; b=J+Pfb9DWqcWcnzUenBwqTQWNV8JYFHlqSH/cd9QHOQg3Qopsp21FWKWbFZxR0p6rC2 wBQ+P0Q6zKdVMSewSeOLpH/aLJmm3DGpg01N8k2U0BBNsvz4pt5zIUEYHjkVcB9aNmwZ HnyMsOuX5SipLNOUit4y7jc3iVbGjZ6G7oyOeyT7f3VH65Z9ho+Ck/FWbEnor3Kp2YKT dRPci2mCPh8/vtYSE7OLpzCZcviS3gr2JmiJP5GXFQGd3nYmI1IcSUdH5SGcOud/vynN OqPZAAS0LvV/YYzeGaWgoNjb7KXH+QKTIY21pcBmFwROXyh35sOf+FZahp1IByRSusvu 77gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=YvLyS0S5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d7-20020a170906040700b00988c92d2861si1259017eja.397.2023.08.04.01.26.55; Fri, 04 Aug 2023 01:27:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=YvLyS0S5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234310AbjHDH3m (ORCPT + 99 others); Fri, 4 Aug 2023 03:29:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234169AbjHDH3I (ORCPT ); Fri, 4 Aug 2023 03:29:08 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 014993AA6 for ; Fri, 4 Aug 2023 00:29:07 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 300E966071BD; Fri, 4 Aug 2023 08:29:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1691134145; bh=2c+FsWSMCsIjoPxVpExi1poYE+difGX9dXXLJhfN7Oo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YvLyS0S52p6DOHMp7hwxi8SH342b3e6R4kIbstOlpCvXs/VjWDkr355vbGlM3h4ji 6uc6YyrT9np0lNvOAkosTIAeD4IE9s1dcI4S8RAYL3zeNfPly65m5khwlzwoiEZTct c92hryfaNR9ItaFd7K32wjkJa0bYN57LbUGZZVoTlQMOF/dlXChB3yhmcutrjCFS3K 45v7UclhHU2/oxpRqU09kN4VbZPww4fApDTlqU5QpYObeDVESmxExb+3i6w0ol0Qx3 1Sgoucsw9tjjzr776jPRbnCvQ8PQPwjprmy2t29ke/edsnM6ELkEMGs/13fyxRCqoA lu9nF3EUNJCbw== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wenst@chromium.org, kernel@collabora.com, ehristev@collabora.com, "Jason-JH . Lin" , Alexandre Mergnat Subject: [PATCH v10 10/16] drm/mediatek: gamma: Support multi-bank gamma LUT Date: Fri, 4 Aug 2023 09:28:44 +0200 Message-ID: <20230804072850.89365-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230804072850.89365-1-angelogioacchino.delregno@collabora.com> References: <20230804072850.89365-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Newer Gamma IP have got multiple LUT banks: support specifying the size of the LUT banks and handle bank-switching before programming the LUT in mtk_gamma_set_common() in preparation for adding support for MT8195 and newer SoCs. Suggested-by: Jason-JH.Lin [Angelo: Refactored original commit] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat --- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 70 ++++++++++++++--------- 1 file changed, 44 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c index 1845bd326a6d..3f1c6815ea5a 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -24,6 +24,8 @@ #define DISP_GAMMA_SIZE 0x0030 #define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16) #define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0) +#define DISP_GAMMA_BANK 0x0100 +#define DISP_GAMMA_BANK_BANK GENMASK(1, 0) #define DISP_GAMMA_LUT 0x0700 #define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20) @@ -37,6 +39,7 @@ struct mtk_disp_gamma_data { bool has_dither; bool lut_diff; + u16 lut_bank_size; u16 lut_size; u8 lut_bits; }; @@ -80,41 +83,54 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state) unsigned int i; struct drm_color_lut *lut; void __iomem *lut_base; - u32 cfg_val, word; + u32 cfg_val, lbank_val, word; + int cur_bank, num_lut_banks; /* If there's no gamma lut there's nothing to do here. */ if (!state->gamma_lut) return; + num_lut_banks = gamma->data->lut_size / gamma->data->lut_bank_size; cfg_val = readl(gamma->regs + DISP_GAMMA_CFG); lut_base = gamma->regs + DISP_GAMMA_LUT; lut = (struct drm_color_lut *)state->gamma_lut->data; - for (i = 0; i < gamma->data->lut_size; i++) { - struct drm_color_lut diff, hwlut; - - hwlut.red = drm_color_lut_extract(lut[i].red, gamma->data->lut_bits); - hwlut.green = drm_color_lut_extract(lut[i].green, gamma->data->lut_bits); - hwlut.blue = drm_color_lut_extract(lut[i].blue, gamma->data->lut_bits); - - if (!gamma->data->lut_diff || (i % 2 == 0)) { - word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); - word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green); - word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); - } else { - diff.red = lut[i].red - lut[i - 1].red; - diff.red = drm_color_lut_extract(diff.red, gamma->data->lut_bits); - - diff.green = lut[i].green - lut[i - 1].green; - diff.green = drm_color_lut_extract(diff.green, gamma->data->lut_bits); - - diff.blue = lut[i].blue - lut[i - 1].blue; - diff.blue = drm_color_lut_extract(diff.blue, gamma->data->lut_bits); - - word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); - word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); - word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue); + + for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) { + + /* Switch gamma bank and set data mode before writing LUT */ + if (num_lut_banks > 1) { + lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank); + writel(lbank_val, gamma->regs + DISP_GAMMA_BANK); + } + + for (i = 0; i < gamma->data->lut_bank_size; i++) { + int n = (cur_bank * gamma->data->lut_bank_size) + i; + struct drm_color_lut diff, hwlut; + + hwlut.red = drm_color_lut_extract(lut[n].red, gamma->data->lut_bits); + hwlut.green = drm_color_lut_extract(lut[n].green, gamma->data->lut_bits); + hwlut.blue = drm_color_lut_extract(lut[n].blue, gamma->data->lut_bits); + + if (!gamma->data->lut_diff || (i % 2 == 0)) { + word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); + } else { + diff.red = lut[n].red - lut[n - 1].red; + diff.red = drm_color_lut_extract(diff.red, gamma->data->lut_bits); + + diff.green = lut[n].green - lut[n - 1].green; + diff.green = drm_color_lut_extract(diff.green, gamma->data->lut_bits); + + diff.blue = lut[n].blue - lut[n - 1].blue; + diff.blue = drm_color_lut_extract(diff.blue, gamma->data->lut_bits); + + word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); + word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue); + } + writel(word, (lut_base + i * 4)); } - writel(word, (lut_base + i * 4)); } /* Enable the gamma table */ @@ -218,11 +234,13 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev) static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = { .has_dither = true, + .lut_bank_size = 512, .lut_bits = 10, .lut_size = 512, }; static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = { + .lut_bank_size = 512, .lut_bits = 10, .lut_diff = true, .lut_size = 512, -- 2.41.0