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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?aim0AS61IYlgjHaI+nOQ/5uqhNSViKg16Zlfe6b7r0oYBhLgXejNvXrOku7J?= =?us-ascii?Q?w+trLhhrtZXg85OgrckHD3Y2u7OEiJBHAbk8/aSn7jEoUJ+xd7Yk1FJquI0o?= =?us-ascii?Q?losnMwpNDmXNn5EtQ5QNQSyIhkbOgVpc3S3YvMZTJrKVzkWCfKSKJ7jkCCSp?= =?us-ascii?Q?Nc9t8VTyJLezm9oJ96rakdy9en1t4GFP9CnLUS+1r+XHsyzSHTsEqxDQWwKd?= =?us-ascii?Q?GcMfGIq25W+9L6849aw2jFbc2mCO6WnLFcHkzuBqNB1TFf1atXDaGb9dpO3X?= =?us-ascii?Q?hkXCnVNTTZ8JfQAVCs5XkEKZ/denH2ZbU7edf21VSJtdaqyOYlTw+rt34YvS?= =?us-ascii?Q?rTtLiaCNCJ4Lo1cUqi++ZgApnm1sI6DhvpVJd3WxvIczQVIAri9ecBrd1Ir2?= =?us-ascii?Q?3GVDFxR+BlT/xQTXjH0DO0l57ylJWDx1K/KUATI6ULVI1c7RazDEy3/MvsL6?= =?us-ascii?Q?fU12+2ICaHewb5xIRxwPBRhKZ2smqNyGM/xc8ZGzFHTAXIXoPH0FNYw8WoaS?= =?us-ascii?Q?NVyGUzZwr1oMXsAnGRtMPnYuzUriSBmIPhHsdbptjzGd+lC0g+/TzW1fCrOo?= =?us-ascii?Q?osfbEX0N6e8Dz2AA5kkbZHK2z1TyJ18wAsNScxqJLFydDILTjvB1daUx4/+e?= =?us-ascii?Q?Gtg4spFftXNcuklWFJ0oW5ej3h4uv0Zn3sDjm9NI/3HJyVUYv4vKOG/Orqid?= =?us-ascii?Q?LK5rbsLo6CLeFVirI7PONCTVndNutbVmVmvs1PqdKRaLXhu2OtbYuJ3DECq0?= =?us-ascii?Q?FG+XBBAnt0GMx765qcuiO4kVo+0nHvGre5q8J/Mtvy9ltD9L2JaT8lbtkd6f?= =?us-ascii?Q?44btL0TwJpeMUofANOuUAhnvozwNJr/oGYiI19/dwzQx1+pICpaaTpetg4mv?= =?us-ascii?Q?RLW/LVdRyCVMHO6Xu3+aQORnqteXe6NrXvKl/Pe7d1Ku18eW7qrl+4EHd+ge?= =?us-ascii?Q?BUMI1sSqd0uI0MJ6oKMdTnX7b9+7CrUT30r3P8tiWAp/7HkKvrSVZRfI3dfe?= =?us-ascii?Q?bjkTNC7ENuuQxo07EvywquulJW34OZVVZI1XH10QzqYYjrEA9Mb2v2WJ0Oee?= =?us-ascii?Q?77pnn0p02VQBtRWl3sA5QyYtb6qWFEJt0HnMS/2/yghIBJNiK1wvhdpT3JYg?= =?us-ascii?Q?yI4vClIb48CZs0HQguDsKPCF+umrg4yua2z8qg3OSw83c5v9+P4+HVrZID3U?= =?us-ascii?Q?A+uwtVex4bT2GS1pTXH0GbramJTwiAmOaAcbH7mWFyNAnL7pILVT+9JJTzq6?= =?us-ascii?Q?2RwyeysGEPWsCVSoe+ayBpp26D+tgYweI/+dM3odqIwK98Wx77wSYUssjoLB?= =?us-ascii?Q?2KljtBoLsL0Fyay6rdoXXVHXyzMPUvtuPSDQIe3EXeOUXSB5OwYtqFWIlzRL?= =?us-ascii?Q?KQDjA9sELGVWmtZsOz1GPKShtWYfg+UNnGLhOjJpW6cLywwsHCm2T7EtswLZ?= =?us-ascii?Q?uzn894svRRCo7KZ3gHypKc8S6DJsAqBbq+Ckx/+9t5O5ewwCGesChLP++Tae?= =?us-ascii?Q?Sw5MPFRaJhVeTWbBuflhpxqmyJkR9osv+5onWFAFmCdRnjCHo2DdumcJwB7u?= =?us-ascii?Q?V5pH0i2G1v4skZ9d3odnPYxQxeVgXq7/dm3FIDQm?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 55bee366-ba0a-4dc6-a173-08db94f1f218 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Aug 2023 13:51:47.4974 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: q0FG1ew66y3JB2f5cVeF/9Sy8wwVXR/OvfBUu9cKp/KmI3Cg3Wk/yKormJlpwe6j X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7834 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 02, 2023 at 02:24:21PM -0700, Jacob Pan wrote: > Intel ENQCMD requires a single PASID to be shared between multiple > devices, as the PASID is stored in a single MSR register per-process > and userspace can use only that one PASID. > > This means that the PASID allocation for any ENQCMD using device driver > must always come from a shared global pool, regardless of what kind of > domain the PASID will be used with. > > Split the code for the global PASID allocator into > iommu_alloc/free_global_pasid() so that drivers can attach non-SVA > domains to PASIDs as well. > > This patch moves global PASID allocation APIs from SVA to IOMMU APIs. > Reserved PASIDs, currently only RID_PASID, are excluded from the global > PASID allocation. > > It is expected that device drivers will use the allocated PASIDs to > attach to appropriate IOMMU domains for use. > > Reviewed-by: Lu Baolu > Reviewed-by: Kevin Tian > Signed-off-by: Jacob Pan > --- > v8: fix off-by-one in max_pasid check > v7: simplify range check (Baolu) > v6: explicitly exclude reserved a range from SVA PASID allocation > check mm PASID compatibility with device > v5: move PASID range check inside API so that device drivers only pass > in struct device* (Kevin) > v4: move dummy functions outside ifdef CONFIG_IOMMU_SVA (Baolu) > --- > drivers/iommu/iommu-sva.c | 29 ++++++++++------------------- > drivers/iommu/iommu.c | 28 ++++++++++++++++++++++++++++ > include/linux/iommu.h | 10 ++++++++++ > 3 files changed, 48 insertions(+), 19 deletions(-) Reviewed-by: Jason Gunthorpe Jason