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Date:   Sat, 5 Aug 2023 13:33:44 +0200
From:   Simon Horman <horms@kernel.org>
To:     Sai Krishna <saikrishnag@marvell.com>
Cc:     davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
        pabeni@redhat.com, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, sgoutham@marvell.com,
        gakula@marvell.com, sbhatta@marvell.com, hkelam@marvell.com,
        richardcochran@gmail.com,
        Naveen Mamindlapalli <naveenm@marvell.com>
Subject: Re: [net-next PATCH] octeontx2-pf: Use PTP HW timestamp counter
 atomic update feature
Message-ID: <ZM4zmG55sEr9b62l@vergenet.net>
References: <20230804093014.2729634-1-saikrishnag@marvell.com>
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In-Reply-To: <20230804093014.2729634-1-saikrishnag@marvell.com>
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On Fri, Aug 04, 2023 at 03:00:14PM +0530, Sai Krishna wrote:
> Some of the newer silicon versions in CN10K series supports a feature
> where in the current PTP timestamp in HW can be updated atomically
> without losing any cpu cycles unlike read/modify/write register.
> This patch uses this feature so that PTP accuracy can be improved
> while adjusting the master offset in HW. There is no need for SW
> timecounter when using this feature. So removed references to SW
> timecounter wherever appropriate.
> 
> Signed-off-by: Sai Krishna <saikrishnag@marvell.com>
> Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>

...

>  struct npc_get_field_status_req {
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/ptp.c b/drivers/net/ethernet/marvell/octeontx2/af/ptp.c

...

>  
> -static bool is_ptp_tsfmt_sec_nsec(struct ptp *ptp)
> +static inline bool is_tstmp_atomic_update_supported(struct rvu *rvu)

Hi Sai,

Please avoid using the inline keyword for functions in .c files.
Unless there is a demonstrable advantage to doing so it should
be left up to the compiler to inline or not.

...

-- 
pw-bot: changes-requested