Received: by 2002:a05:6359:6284:b0:131:369:b2a3 with SMTP id se4csp1075170rwb; Sat, 5 Aug 2023 06:59:53 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEST73GryzfWgWFYi6YiGbpw2XZIHnK1i1A/XTfGuAg5HV/cWgxhMqhkGUSjeEK2z4WM0HZ X-Received: by 2002:a17:90b:4a90:b0:268:273e:b75d with SMTP id lp16-20020a17090b4a9000b00268273eb75dmr4253096pjb.20.1691243992903; Sat, 05 Aug 2023 06:59:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691243992; cv=none; d=google.com; s=arc-20160816; b=aZPoJXme/wDn69oxDKKeOaFpKP4nfb57pvimJchRkaiYSgPAFgSiEsg9RkjiNYivfB bF/+IsWDUB7jnpMd0AXUNVaraHE1i2TvQDkliq0EUYsyaLLkJpheF43+1u/94d0hNrk5 zBqGIlChoa7sB63zsFY4skA9WROoFRtwu5xR9DwpMhTxqQg12eQTAegYhDk3cQqwCBuk w8/UJ9SBBJ0+gbNrqShidQeJbzEBZq3fhoBzQNRcFx0T4Hykzq/UfOsg9JoYMXl5VgBp qf6XBpbk1lmZlNvtEw4HkvgLiWRFJX5HncRBG9rh3R1feaBOeH/DTER4h2CINf2hTpAi ySLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=UIZCorPNYUH2jkiVRuR7FSmjsopaTm8kFTAnEKf8VTE=; fh=ovwKXMY87v1cbqHLBqRopOXh/CR5a9/QHvfN1t+QVWw=; b=b1PQTqlXiZPEuasothr/VqT+jfPKLRD1kWqvEenuJ316qnr4PR7WM8p1Z+K9WqFiHT 31JNLCNbp+HLbgkS1qd+cnunHP8ra8bM+9RVbRhkL1tyEViDRmaAw5hi8KCHzJoEV9Bp OiW/2zafIj7hlF6LPtU5NwywSa+c16U7/FtzBf0T0hDMjPhMmdaXTP522S7s4GuEfUOi buXCoMbIH+HvKTURw95dv7ep5xJHYw/9HOxP8EevoEDmexG0YPo3igo3A+817LNgzZVi H/YlfN9vWHdoDt1WNDqtTJY2OEeF1ped33Gk4Hf+O1DXHHIeDTk8Ob3o4ZWhOM1XJT4k kcHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@canonical.com header.s=20210705 header.b=bHZvhihx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=canonical.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id pi5-20020a17090b1e4500b00262f0035181si1622523pjb.26.2023.08.05.06.59.41; Sat, 05 Aug 2023 06:59:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@canonical.com header.s=20210705 header.b=bHZvhihx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=canonical.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229756AbjHENOp (ORCPT + 99 others); Sat, 5 Aug 2023 09:14:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229581AbjHENOn (ORCPT ); Sat, 5 Aug 2023 09:14:43 -0400 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30DF5E70 for ; Sat, 5 Aug 2023 06:14:40 -0700 (PDT) Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id E93EB3F20E for ; Sat, 5 Aug 2023 13:14:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1691241278; bh=UIZCorPNYUH2jkiVRuR7FSmjsopaTm8kFTAnEKf8VTE=; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject: To:Cc:Content-Type; b=bHZvhihxtmDr5Ow0JCOUpb91//mNIAdHegjOHODQUatzVrA0lNNFvzbYPCZfnDvX4 f3YOmOzJaPR/rQhljJFoalICXpCWME4/UpZVmb9p0HDZJEzwxhEwqC67DD8dJzjAzz p2VRUkPW597Yp82env3puuVEcAad10zB5ezZMhsAXdEByO8y0fxUVI6MvWaBKkVktl xGxVi1tFwNrYi44dXe9uEJWrlDhWvv3r526CagxOvlxEBK2nUWYNDqi09pd20ccrc5 XL6Q1qc5TB2djG3Z5MWzXL6Jr4phdouddU3L4lYLknEcOYkzQ5Gj/btfsdvfVGNqgS TBRf3ftbpbpVQ== Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-7683da3e2a5so332739385a.3 for ; Sat, 05 Aug 2023 06:14:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691241277; x=1691846077; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=UIZCorPNYUH2jkiVRuR7FSmjsopaTm8kFTAnEKf8VTE=; b=Fv90HJ0q8yJLv4YcAS42b7R1fT6sU3Ixh2AKBViwDBCHD6RnqAdtVLPpZ/jo5kG4vC h21imcxeP0moCXcWVosDjWrqZceGi6vKZwpsZFvpmepdoSMtrtdiQy5HJwqcR6Yslqr7 37/ysaa4j40swjaTZT7sWW6HX8G0MhfNblsGyXcxW0wTgP64paiR+8fjnqRI3XpatpNI k3qkUIXLtk73OB3RGvCXGpbKo803oU1wJ2pJByNcKRsxqTZ+lDlxWK3+AfEq2SB2ElI+ rgfB0AVgwVsH23vdkMWEtZq75ICMEnDphgValFW9qSAekP15PrYxFAdYVtettQTKdSad i08A== X-Gm-Message-State: AOJu0YwmZb+c/7L5MEo4/hImyuzENETwZ+irKWz6XDkcd5QIwnPKDMLT S0iODxt1Y+xoZqF79l5NIeNI7VvGr9f99tC7Wb4B6ntmtY21N5adgF4a48ixImOfYqyrcnpkAM4 OeIh+jnEfJGW0m4mzJR2l/sFD0gRgiXwfGesmyzECU2+fMtFyy0/bZO4k+g== X-Received: by 2002:a05:620a:b19:b0:76c:4833:f851 with SMTP id t25-20020a05620a0b1900b0076c4833f851mr4889926qkg.47.1691241277322; Sat, 05 Aug 2023 06:14:37 -0700 (PDT) X-Received: by 2002:a05:620a:b19:b0:76c:4833:f851 with SMTP id t25-20020a05620a0b1900b0076c4833f851mr4889905qkg.47.1691241277035; Sat, 05 Aug 2023 06:14:37 -0700 (PDT) MIME-Version: 1.0 References: <20230215113249.47727-1-william.qiu@starfivetech.com> <20230215113249.47727-4-william.qiu@starfivetech.com> In-Reply-To: From: Emil Renner Berthing Date: Sat, 5 Aug 2023 15:14:20 +0200 Message-ID: Subject: Re: [PATCH v4 3/4] riscv: dts: starfive: Add mmc node To: William Qiu Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 15 Feb 2023 at 13:26, William Qiu wrote: > On 2023/2/15 20:22, Emil Renner Berthing wrote: > > On Wed, 15 Feb 2023 at 13:12, Emil Renner Berthing > > wrote: > >> > >> On Wed, 15 Feb 2023 at 12:35, William Qiu wrote: > >> > > >> > Add the mmc node for the StarFive JH7110 SoC. > >> > Set mmco node to emmc and set mmc1 node to sd. > >> > > >> > Signed-off-by: William Qiu > >> > --- > >> > .../jh7110-starfive-visionfive-2.dtsi | 23 +++++++++ > >> > arch/riscv/boot/dts/starfive/jh7110.dtsi | 47 +++++++++++++++++++ > >> > 2 files changed, 70 insertions(+) > >> > > >> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > >> > index c60280b89c73..e1a0248e907f 100644 > >> > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > >> > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > >> > @@ -42,6 +42,29 @@ &rtc_osc { > >> > clock-frequency = <32768>; > >> > }; > >> > > >> > +&mmc0 { > >> > + max-frequency = <100000000>; > >> > + bus-width = <8>; > >> > + cap-mmc-highspeed; > >> > + mmc-ddr-1_8v; > >> > + mmc-hs200-1_8v; > >> > + non-removable; > >> > + cap-mmc-hw-reset; > >> > + post-power-on-delay-ms = <200>; > >> > + status = "okay"; > >> > +}; > >> > + > >> > +&mmc1 { > >> > + max-frequency = <100000000>; > >> > + bus-width = <4>; > >> > + no-sdio; > >> > + no-mmc; > >> > + broken-cd; > >> > + cap-sd-highspeed; > >> > + post-power-on-delay-ms = <200>; > >> > + status = "okay"; > >> > +}; > > > > These nodes are also still oddly placed in the middle of the external > > clocks. Again please keep the external clocks at the top and then > > order the nodes alphabetically to have some sort of system. > > > > > Hi Emil, > > I'll update it in next version. Hi William, It seems the mmc nodes are still missing from the upstream device tree. The sysreg nodes have been added in Conors riscv-dt-for-next[1] branch, so I don't see any missing dependencies. Could you please update and send a new version of this? [1]: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=riscv-dt-for-next /Emil > Best Regards > William > > >> > &gmac0_rmii_refin { > >> > clock-frequency = <50000000>; > >> > }; > >> > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> > index 64d260ea1f29..17f7b3ee6ca3 100644 > >> > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> > @@ -314,6 +314,11 @@ uart2: serial@10020000 { > >> > status = "disabled"; > >> > }; > >> > > >> > + stg_syscon: syscon@10240000 { > >> > + compatible = "starfive,jh7110-stg-syscon", "syscon"; > >> > + reg = <0x0 0x10240000 0x0 0x1000>; > >> > + }; > >> > + > >> > uart3: serial@12000000 { > >> > compatible = "snps,dw-apb-uart"; > >> > reg = <0x0 0x12000000 0x0 0x10000>; > >> > @@ -370,6 +375,11 @@ syscrg: clock-controller@13020000 { > >> > #reset-cells = <1>; > >> > }; > >> > > >> > + sys_syscon: syscon@13030000 { > >> > + compatible = "starfive,jh7110-sys-syscon", "syscon"; > >> > + reg = <0x0 0x13030000 0x0 0x1000>; > >> > + }; > >> > + > >> > gpio: gpio@13040000 { > >> > compatible = "starfive,jh7110-sys-pinctrl"; > >> > reg = <0x0 0x13040000 0x0 0x10000>; > >> > @@ -397,6 +407,11 @@ aoncrg: clock-controller@17000000 { > >> > #reset-cells = <1>; > >> > }; > >> > > >> > + aon_syscon: syscon@17010000 { > >> > + compatible = "starfive,jh7110-aon-syscon", "syscon"; > >> > + reg = <0x0 0x17010000 0x0 0x1000>; > >> > + }; > >> > + > >> > gpioa: gpio@17020000 { > >> > compatible = "starfive,jh7110-aon-pinctrl"; > >> > reg = <0x0 0x17020000 0x0 0x10000>; > >> > @@ -407,5 +422,37 @@ gpioa: gpio@17020000 { > >> > gpio-controller; > >> > #gpio-cells = <2>; > >> > }; > >> > + > >> > + mmc0: mmc@16010000 { > >> > + compatible = "starfive,jh7110-mmc"; > >> > + reg = <0x0 0x16010000 0x0 0x10000>; > >> > + clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>, > >> > + <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; > >> > + clock-names = "biu","ciu"; > >> > + resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>; > >> > + reset-names = "reset"; > >> > + interrupts = <74>; > >> > + fifo-depth = <32>; > >> > + fifo-watermark-aligned; > >> > + data-addr = <0>; > >> > + starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>; > >> > + status = "disabled"; > >> > + }; > >> > + > >> > + mmc1: mmc@16020000 { > >> > + compatible = "starfive,jh7110-mmc"; > >> > + reg = <0x0 0x16020000 0x0 0x10000>; > >> > + clocks = <&syscrg JH7110_SYSCLK_SDIO1_AHB>, > >> > + <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; > >> > + clock-names = "biu","ciu"; > >> > + resets = <&syscrg JH7110_SYSRST_SDIO1_AHB>; > >> > + reset-names = "reset"; > >> > + interrupts = <75>; > >> > + fifo-depth = <32>; > >> > + fifo-watermark-aligned; > >> > + data-addr = <0>; > >> > + starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>; > >> > + status = "disabled"; > >> > + }; > >> > >> Hi William, > >> > >> These nodes still don't seem to be sorted by address, eg. by the > >> number after the @ > >> Also please move the dt-binding patch before this one, so dtb_check > >> won't fail no matter where git bisect happens to land. > >> > >> /Emil > >> > >> > }; > >> > }; > >> > -- > >> > 2.34.1 > >> > > >> > > >> > _______________________________________________ > >> > linux-riscv mailing list > >> > linux-riscv@lists.infradead.org > >> > http://lists.infradead.org/mailman/listinfo/linux-riscv