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From:   Adam Ford <aford173@gmail.com>
Date:   Sun, 6 Aug 2023 17:20:17 -0500
Message-ID: <CAHCN7xLcZvcB0fmoxK2EuLxmPQGCtCKcfPDozhDwYSX4fJutrw@mail.gmail.com>
Subject: Re: [PATCH] arm64: dts: imx8mp-beacon: Configure 100MHz PCIe Ref Clk
To:     Fabio Estevam <festevam@gmail.com>
Cc:     linux-arm-kernel@lists.infradead.org, aford@beaconembedded.com,
        cstevens@beaconembedded.com, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        NXP Linux Team <linux-imx@nxp.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Magnus Damm <magnus.damm@gmail.com>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-renesas-soc@vger.kernel.org
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On Sun, Aug 6, 2023 at 5:03=E2=80=AFPM Fabio Estevam <festevam@gmail.com> w=
rote:
>
> Hi Adam,
>
> On Sun, Aug 6, 2023 at 4:06=E2=80=AFPM Adam Ford <aford173@gmail.com> wro=
te:
>
> >  &pcie_phy {
> > +       fsl,clkreq-unsupported;
> >         fsl,refclk-pad-mode =3D <IMX8_PCIE_REFCLK_PAD_INPUT>;
> > -       clocks =3D <&pcie0_refclk>;
>
> Should the pcie0_refclk node be also removed? It seems to be unused
> after this patch.

Oops, you're right.  I will send a V2.

>
> > +       clocks =3D <&pcieclk 1>;
>
> Isn't clocks =3D <&pcieclk>; (without the extra 1) enough?

The clock generator has two outputs called DIF0 and DIF1.  This
hardware uses DIF1 for the reference clock, so I need to specify
output 1.

adam