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Date:   Mon, 7 Aug 2023 10:42:07 -0500
From:   Nishanth Menon <nm@ti.com>
To:     Andrew Davis <afd@ti.com>
CC:     Dhruva Gole <d-gole@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
        Tero Kristo <kristo@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the
 board level
Message-ID: <20230807154207.7eho6er55revipjo@shuffling>
References: <20230802205309.257392-1-afd@ti.com>
 <20230802205309.257392-11-afd@ti.com>
 <ea932535-b69c-ec57-0dfe-31a891b6df5c@ti.com>
 <1b3366b0-e3a4-3609-9e25-7b880d2fe656@ti.com>
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On 10:28-20230807, Andrew Davis wrote:
> On 8/7/23 12:38 AM, Dhruva Gole wrote:
> > Andrew,
> > 
> > On 03/08/23 02:23, Andrew Davis wrote:
> > > GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
> > > and may not be functional unless they are extended with pinmux and
> > > device information.
> > > 
> > > Disable the GPIO nodes in the dtsi files and only enable the ones that
> > > are actually pinned out on a given board.
> > > 
> > > Signed-off-by: Andrew Davis <afd@ti.com>
> > > ---
> > > ? .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++--------------
> > > ? arch/arm64/boot/dts/ti/k3-j7200-main.dtsi????? |? 4 ++++
> > > ? .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |? 2 ++
> > > ? 3 files changed, 10 insertions(+), 14 deletions(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> > > index dee9056f56051..4a5c4f36baeec 100644
> > > --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> > > +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> > > @@ -240,27 +240,17 @@ &main_uart3 {
> > > ????? pinctrl-0 = <&main_uart3_pins_default>;
> > > ? };
> > > -&main_gpio2 {
> > > -??? status = "disabled";
> > > -};
> > > -
> > > -&main_gpio4 {
> > > -??? status = "disabled";
> > > -};
> > > -
> > > -&main_gpio6 {
> > > -??? status = "disabled";
> > > +&main_gpio0 {
> > > +??? status = "okay";
> > > +??? /* default pins */
> > 
> > Small question, where is the pmx for main_gpio0? What does "default pins"
> > refer to here? Where are they pinmuxed?
> > 
> 
> Good question, where is the pmx for main_gpio0? I don't know, it was
> never defined before either, we only are noticing this now as we are
> disabling by default instead of leaving an unfinished node enabled
> by default. (another benefit of this disabled by default scheme).
> 
> What is really happening is GPIO nodes we tend to pinmux differently
> than normal device nodes. Their pinmux selections tends to be spread
> out in all the nodes that make use of these GPIO pins, not all together
> here in this node.
> 
> For instance in this device we use one of the main_gpio0 pins as a
> GPIO toggled regulator, and we define the pinmux for it in that node
> (see vdd-sd-dv-default-pins).
> 
> We can either define the rest of the pins not used elsewhere
> here, or we can consider GPIO an exception to the rule, I'd say
> the latter is fine for now.


GPIO pinmux are typically defined where they need - the only place where
they are explicitly called out in gpio is when they are meant to be used by
libgpio - typically in the case of dev boards.

Just drop the comments of /* default pins */ - that is just mis-leading.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D