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Message-ID: <0d311099-a93e-4270-e78f-a464b7fcaa34@ti.com>
Date:   Mon, 7 Aug 2023 20:09:41 +0530
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Subject: Re: [PATCH v2] arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset
 for ospi
Content-Language: en-US
To:     Udit Kumar <u-kumar1@ti.com>, <nm@ti.com>, <vigneshr@ti.com>,
        <kristo@kernel.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
        <t-konduru@ti.com>, <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
References: <20230802114126.162445-1-u-kumar1@ti.com>
From:   Vaishnav Achath <vaishnav.a@ti.com>
In-Reply-To: <20230802114126.162445-1-u-kumar1@ti.com>
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Precedence: bulk

Hi Udit,

On 02/08/23 17:11, Udit Kumar wrote:
> After splitting wkup_pmx pin mux for J784S4 into four regions.
> Pin mux offset for OSPI nodes were not updated to align with new
> regions, due to this while setting ospi pin muxes out of range
> error was seen.
> 
> Pin mux offsets for OSPI nodes are corrected in this patch.
> 
> Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
> Signed-off-by: Udit Kumar <u-kumar1@ti.com>
> ---
> Logs
> https://gist.github.com/uditkumarti/f3b1a5402f7202931a4b905f7d331502
> 
> Please apply patch https://lore.kernel.org/all/20230721082654.27036-1-tony@atomide.com/
> before this
> 
> Change log:
> 
> Change in v2
>   Changed name of pin mux to align with
>   https://lore.kernel.org/all/20230721082654.27036-1-tony@atomide.com/ patch
>   
> 
> v1: https://lore.kernel.org/all/20230801141920.3317697-1-u-kumar1@ti.com/
>  
>  arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 29 +++++++++++++++---------
>  1 file changed, 18 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> index 7ad152a1b90f..d594d233af87 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -379,21 +379,28 @@ J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */
>  			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */
>  			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */
>  			J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
> -			J784S4_WKUP_IOPAD(0x03c, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_CSn3.MCU_OSPI0_ECC_FAIL */
> -			J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_CSn2.MCU_OSPI0_RESET_OUT0 */
> +		>;
> +	};
> +};
> +
> +&wkup_pmx1 {
> +	mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
> +		pinctrl-single,pins = <
> +			J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */
> +			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */
>  		>;
>  	};
>  
>  	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
>  		pinctrl-single,pins = <
> -			J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
> -			J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
> -			J784S4_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
> -			J784S4_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
> -			J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
> -			J784S4_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
> -			J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
> -			J784S4_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
> +			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
> +			J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
> +			J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
> +			J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
> +			J784S4_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
> +			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
> +			J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
> +			J784S4_WKUP_IOPAD(0x00C, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */

Thank you for the patch,

For OSPI functionality:

Tested-by: Vaishnav Achath <vaishnav.a@ti.com>

before: https://gist.github.com/vaishnavachath/c87275e53f6ae38bacc44c65ed09c733
(QSPI probe fails due to wrong pinmux)
after: https://gist.github.com/vaishnavachath/b5f6147cfae5218815aca94ec0dfd991
(both QSPI, OSPI is functional)

heads-up :
I see the following warnings for ADC:

```
 pinctrl-single 4301c068.pinctrl: mux offset out of range: 0x134 (0x120)
 pinctrl-single 4301c068.pinctrl: could not add functions for
mcu-adc0-default-pins 308x
pinctrl-single 4301c068.pinctrl: mux offset out of range: 0x154 (0x120)
pinctrl-single 4301c068.pinctrl: could not add functions for
mcu-adc1-default-pins 340x
```

mcu_adc0_pins_default and mcu_adc1_pins_default entries needs to have the
wkup_pmx2 base (0x68) subtracted to get the appropriate offsets, not sure if
there is already a patch addressing the same or should be part of this patch.

Thanks and Regards,
Vaishnav

>  		>;
>  	};
>  };
> @@ -437,7 +444,7 @@ &fss {
>  &ospi0 {
>  	status = "okay";
>  	pinctrl-names = "default";
> -	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
> +	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_1_pins_default>;
>  
>  	flash@0 {
>  		compatible = "jedec,spi-nor";