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From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Mon, 7 Aug 2023 12:21:26 -0400
Message-ID: <CADnq5_M9j6pM+cic6PHj2k+AhkxnsyYfWMh2gfJ168uQD2jANQ@mail.gmail.com>
Subject: Re: [PATCH] drm/amd/pm: Clean up errors in smu_v13_0_6_ppt.c
To:     Ran Sun <sunran001@208suo.com>
Cc:     alexander.deucher@amd.com, airlied@gmail.com, daniel@ffwll.ch,
        dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
        linux-kernel@vger.kernel.org
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Applied.  Thanks!

On Mon, Jul 31, 2023 at 10:06=E2=80=AFPM Ran Sun <sunran001@208suo.com> wro=
te:
>
> Fix the following errors reported by checkpatch:
>
> ERROR: code indent should use tabs where possible
> ERROR: that open brace { should be on the previous line
>
> Signed-off-by: Ran Sun <sunran001@208suo.com>
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drive=
rs/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> index 1ac552142763..43afa1ee1b4a 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> @@ -1248,9 +1248,9 @@ static int smu_v13_0_6_get_power_limit(struct smu_c=
ontext *smu,
>                                        uint32_t *default_power_limit,
>                                        uint32_t *max_power_limit)
>  {
> -        struct smu_table_context *smu_table =3D &smu->smu_table;
> -        struct PPTable_t *pptable =3D
> -                (struct PPTable_t *)smu_table->driver_pptable;
> +       struct smu_table_context *smu_table =3D &smu->smu_table;
> +       struct PPTable_t *pptable =3D
> +               (struct PPTable_t *)smu_table->driver_pptable;
>         uint32_t power_limit =3D 0;
>         int ret;
>
> @@ -1366,8 +1366,7 @@ static int smu_v13_0_6_set_irq_state(struct amdgpu_=
device *adev,
>         return 0;
>  }
>
> -static const struct amdgpu_irq_src_funcs smu_v13_0_6_irq_funcs =3D
> -{
> +static const struct amdgpu_irq_src_funcs smu_v13_0_6_irq_funcs =3D {
>         .set =3D smu_v13_0_6_set_irq_state,
>         .process =3D smu_v13_0_6_irq_process,
>  };
> --
> 2.17.1
>