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Thanks! On Tue, Aug 1, 2023 at 5:34=E2=80=AFAM Ran Sun wrote= : > > Fix the following errors reported by checkpatch: > > ERROR: that open brace { should be on the previous line > > Signed-off-by: Ran Sun > --- > .../drm/amd/pm/powerplay/hwmgr/tonga_baco.c | 30 +++++++------------ > 1 file changed, 10 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/tonga_baco.c b/driver= s/gpu/drm/amd/pm/powerplay/hwmgr/tonga_baco.c > index ea743bea8e29..432d4fd2a0ba 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/tonga_baco.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/tonga_baco.c > @@ -36,8 +36,7 @@ > #include "smu/smu_7_1_2_sh_mask.h" > > > -static const struct baco_cmd_entry gpio_tbl[] =3D > -{ > +static const struct baco_cmd_entry gpio_tbl[] =3D { > { CMD_WRITE, mmGPIOPAD_EN, 0, 0, 0, 0x0 }, > { CMD_WRITE, mmGPIOPAD_PD_EN, 0, 0, 0, 0x0 }, > { CMD_WRITE, mmGPIOPAD_PU_EN, 0, 0, 0, 0x0 }, > @@ -50,15 +49,13 @@ static const struct baco_cmd_entry gpio_tbl[] =3D > { CMD_READMODIFYWRITE, mmDC_GPIO_SYNCA_MASK, 0, 0, 0, 0x00001111 = } > }; > > -static const struct baco_cmd_entry enable_fb_req_rej_tbl[] =3D > -{ > +static const struct baco_cmd_entry enable_fb_req_rej_tbl[] =3D { > { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, 0xC0300024 }, > { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, 0x1, 0x0, 0, 0x1 }, > { CMD_WRITE, mmBIF_FB_EN, 0, 0, 0, 0x0 } > }; > > -static const struct baco_cmd_entry use_bclk_tbl[] =3D > -{ > +static const struct baco_cmd_entry use_bclk_tbl[] =3D { > { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL }, > { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, CG_SPLL_FUNC_CNTL__SPL= L_BYPASS_EN_MASK, CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN__SHIFT, 0, 0x1 }, > { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL_2 = }, > @@ -80,8 +77,7 @@ static const struct baco_cmd_entry use_bclk_tbl[] =3D > { CMD_READMODIFYWRITE, mmMPLL_CNTL_MODE, MPLL_CNTL_MODE__MPLL_MCL= K_SEL_MASK, MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT, 0, 0x0 } > }; > > -static const struct baco_cmd_entry turn_off_plls_tbl[] =3D > -{ > +static const struct baco_cmd_entry turn_off_plls_tbl[] =3D { > { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixCG_SPLL_FUNC_CNTL }, > { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, CG_SPLL_FUNC_CNTL__SPL= L_RESET_MASK, CG_SPLL_FUNC_CNTL__SPLL_RESET__SHIFT, 0, 0x1 }, > { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, CG_SPLL_FUNC_CNTL__SPL= L_PWRON_MASK, CG_SPLL_FUNC_CNTL__SPLL_PWRON__SHIFT, 0, 0x0 }, > @@ -112,8 +108,7 @@ static const struct baco_cmd_entry turn_off_plls_tbl[= ] =3D > { CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK= _SEL_MASK, THM_CLK_CNTL__TMON_CLK_SEL__SHIFT, 0, 0x1 } > }; > > -static const struct baco_cmd_entry enter_baco_tbl[] =3D > -{ > +static const struct baco_cmd_entry enter_baco_tbl[] =3D { > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, BACO= _CNTL__BACO_EN__SHIFT, 0, 0x01 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BIF_SCLK_SWIT= CH_MASK, BACO_CNTL__BACO_BIF_SCLK_SWITCH__SHIFT, 0, 0x01 }, > { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_BIF_SCLK_SWITCH_MASK,= 0, 5, 0x40000 }, > @@ -130,8 +125,7 @@ static const struct baco_cmd_entry enter_baco_tbl[] = =3D > > #define BACO_CNTL__PWRGOOD_MASK BACO_CNTL__PWRGOOD_GPIO_MASK+BACO_CNTL_= _PWRGOOD_MEM_MASK+BACO_CNTL__PWRGOOD_DVO_MASK > > -static const struct baco_cmd_entry exit_baco_tbl[] =3D > -{ > +static const struct baco_cmd_entry exit_baco_tbl[] =3D { > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK= , BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x01 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK= , BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MAS= K, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 }, > @@ -146,22 +140,19 @@ static const struct baco_cmd_entry exit_baco_tbl[] = =3D > { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0xfffff= fff, 0x00 } > }; > > -static const struct baco_cmd_entry clean_baco_tbl[] =3D > -{ > +static const struct baco_cmd_entry clean_baco_tbl[] =3D { > { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 }, > { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 } > }; > > -static const struct baco_cmd_entry gpio_tbl_iceland[] =3D > -{ > +static const struct baco_cmd_entry gpio_tbl_iceland[] =3D { > { CMD_WRITE, mmGPIOPAD_EN, 0, 0, 0, 0x0 }, > { CMD_WRITE, mmGPIOPAD_PD_EN, 0, 0, 0, 0x0 }, > { CMD_WRITE, mmGPIOPAD_PU_EN, 0, 0, 0, 0x0 }, > { CMD_WRITE, mmGPIOPAD_MASK, 0, 0, 0, 0xff77ffff } > }; > > -static const struct baco_cmd_entry exit_baco_tbl_iceland[] =3D > -{ > +static const struct baco_cmd_entry exit_baco_tbl_iceland[] =3D { > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK= , BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x01 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK= , BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 }, > { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MAS= K, BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 }, > @@ -177,8 +168,7 @@ static const struct baco_cmd_entry exit_baco_tbl_icel= and[] =3D > { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 0xfffff= fff, 0x00 } > }; > > -static const struct baco_cmd_entry clean_baco_tbl_iceland[] =3D > -{ > +static const struct baco_cmd_entry clean_baco_tbl_iceland[] =3D { > { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 } > }; > > -- > 2.17.1 >