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References: <20230801095056.8120-1-sunran001@208suo.com>
In-Reply-To: <20230801095056.8120-1-sunran001@208suo.com>
From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Mon, 7 Aug 2023 12:53:20 -0400
Message-ID: <CADnq5_N4tdXL2Fc0j5ZoYAjV=ZDfWctk1J=sOHgRB6CjHzNwgA@mail.gmail.com>
Subject: Re: [PATCH] drm/amd/pm: Clean up errors in smu9_driver_if.h
To:     Ran Sun <sunran001@208suo.com>
Cc:     alexander.deucher@amd.com, airlied@gmail.com, daniel@ffwll.ch,
        dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
        linux-kernel@vger.kernel.org
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Applied.  Thanks!

On Tue, Aug 1, 2023 at 5:51=E2=80=AFAM Ran Sun <sunran001@208suo.com> wrote=
:
>
> Fix the following errors reported by checkpatch:
>
> ERROR: space prohibited before open square bracket '['
>
> Signed-off-by: Ran Sun <sunran001@208suo.com>
> ---
>  .../drm/amd/pm/powerplay/inc/smu9_driver_if.h | 20 +++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/inc/smu9_driver_if.h b/driv=
ers/gpu/drm/amd/pm/powerplay/inc/smu9_driver_if.h
> index faae4b918d90..2c69a5694f94 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/inc/smu9_driver_if.h
> +++ b/drivers/gpu/drm/amd/pm/powerplay/inc/smu9_driver_if.h
> @@ -178,20 +178,20 @@ typedef struct {
>    uint8_t      padding8_2[2];
>
>    /* SOC Frequencies */
> -  PllSetting_t GfxclkLevel        [NUM_GFXCLK_DPM_LEVELS];
> +  PllSetting_t GfxclkLevel[NUM_GFXCLK_DPM_LEVELS];
>
> -  uint8_t      SocclkDid          [NUM_SOCCLK_DPM_LEVELS];          /* D=
ID */
> -  uint8_t      SocDpmVoltageIndex [NUM_SOCCLK_DPM_LEVELS];
> +  uint8_t      SocclkDid[NUM_SOCCLK_DPM_LEVELS];          /* DID */
> +  uint8_t      SocDpmVoltageIndex[NUM_SOCCLK_DPM_LEVELS];
>
> -  uint8_t      VclkDid            [NUM_UVD_DPM_LEVELS];            /* DI=
D */
> -  uint8_t      DclkDid            [NUM_UVD_DPM_LEVELS];            /* DI=
D */
> -  uint8_t      UvdDpmVoltageIndex [NUM_UVD_DPM_LEVELS];
> +  uint8_t      VclkDid[NUM_UVD_DPM_LEVELS];            /* DID */
> +  uint8_t      DclkDid[NUM_UVD_DPM_LEVELS];            /* DID */
> +  uint8_t      UvdDpmVoltageIndex[NUM_UVD_DPM_LEVELS];
>
> -  uint8_t      EclkDid            [NUM_VCE_DPM_LEVELS];            /* DI=
D */
> -  uint8_t      VceDpmVoltageIndex [NUM_VCE_DPM_LEVELS];
> +  uint8_t      EclkDid[NUM_VCE_DPM_LEVELS];            /* DID */
> +  uint8_t      VceDpmVoltageIndex[NUM_VCE_DPM_LEVELS];
>
> -  uint8_t      Mp0clkDid          [NUM_MP0CLK_DPM_LEVELS];          /* D=
ID */
> -  uint8_t      Mp0DpmVoltageIndex [NUM_MP0CLK_DPM_LEVELS];
> +  uint8_t      Mp0clkDid[NUM_MP0CLK_DPM_LEVELS];          /* DID */
> +  uint8_t      Mp0DpmVoltageIndex[NUM_MP0CLK_DPM_LEVELS];
>
>    DisplayClockTable_t DisplayClockTable[DSPCLK_COUNT][NUM_DSPCLK_LEVELS]=
;
>    QuadraticInt_t      DisplayClock2Gfxclk[DSPCLK_COUNT];
> --
> 2.17.1
>