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[209.85.216.43]) by smtp.gmail.com with ESMTPSA id 206-20020a6300d7000000b0056471d2ae8fsm5063597pga.90.2023.08.07.09.34.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Aug 2023 09:34:43 -0700 (PDT) Received: by mail-pj1-f43.google.com with SMTP id 98e67ed59e1d1-269304c135aso2046396a91.3; Mon, 07 Aug 2023 09:34:43 -0700 (PDT) X-Received: by 2002:a17:90a:a792:b0:268:1f0a:9f12 with SMTP id f18-20020a17090aa79200b002681f0a9f12mr9283382pjq.29.1691426082966; Mon, 07 Aug 2023 09:34:42 -0700 (PDT) MIME-Version: 1.0 References: <20230802141829.522595-1-andre.przywara@arm.com> <20230804153432.GA1388331-robh@kernel.org> <20230807144229.5710738d@donnerap.manchester.arm.com> In-Reply-To: <20230807144229.5710738d@donnerap.manchester.arm.com> Reply-To: wens@csie.org From: Chen-Yu Tsai Date: Tue, 8 Aug 2023 00:34:31 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] dt-bindings: mfd: x-powers,axp152: make interrupt optional for more chips To: Andre Przywara Cc: Rob Herring , Lee Jones , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Icenowy Zheng , Shengyu Qu , Martin Botka , Martin Botka , Mark Brown Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 7, 2023 at 9:42 PM Andre Przywara wrote: > > On Fri, 4 Aug 2023 09:34:32 -0600 > Rob Herring wrote: > > Hi, > > > On Wed, Aug 02, 2023 at 03:18:29PM +0100, Andre Przywara wrote: > > > All X-Powers PMICs described by this binding have an IRQ pin, and so > > > far (almost) all boards connected this to some NMI pin or GPIO on the SoC > > > they are connected to. > > > However we start to see boards that omit this connection, and technically > > > the IRQ pin is not essential to the basic PMIC operation. > > > The existing Linux driver allows skipping an IRQ pin setup for some > > > chips already, so update the binding to also make the DT property > > > optional for these chips, so that we can actually have DTs describing > > > boards with the PMIC interrupt not wired up. > > > > > > Signed-off-by: Andre Przywara > > > --- > > > Hi, > > > > > > arguably the IRQ functionality is optional for many more PMICs, > > > especially if a board doesn't use GPIOs or a power key. > > > So I wonder if the interrupts property should become optional for all? > > > After all it's more a board designer's decision to wire up the IRQ pin > > > or not, and nothing that's really related to a particular PMIC. > > > > I would say yes. Particularly if it gets rid of a conditional schema. > > I see your point, and we might get there, but after some digging extending > this to more/all PMICs needs more work, see below. > Given that I was wondering if we can merge this patch now, as this > blocks multiple DTs from being merged (and Connor already ACKed it). > I sent an MFD driver fix to make this actually work for the AXP313a: > https://lore.kernel.org/lkml/20230807133930.94309-1-andre.przywara@arm.com/ Question is which tree we merge it through. We can't merge the DTs without this guaranteed to go in the same cycle without causing DT validation errors. ChenYu > For supporting this on more PMICs: > Currently many Linux (sub-)drivers registered by the MFD driver crash when > there is no valid interrupt registered, and we so far just special cased > the very simple PMICs to skip just the power key driver registration, > which works for those chips. However this affects more drivers (I tested > ac-power-supply), so it's not clear if that's really something useful for > the other PMICs providing more functionality. I guess we can postpone this > until either there is actually a use case for those other PMICs (boards > without the IRQ line connected), or when this list of exceptions grows too > large. > > Cheers, > Andre