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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ob8-20020a17090b390800b00269208e38a2si7679229pjb.105.2023.08.08.10.25.44; Tue, 08 Aug 2023 10:25:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=iOK78fj4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233222AbjHHQjr (ORCPT + 99 others); Tue, 8 Aug 2023 12:39:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58636 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232020AbjHHQjH (ORCPT ); Tue, 8 Aug 2023 12:39:07 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C51683A4FA; Tue, 8 Aug 2023 08:54:14 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3785A2Yr031096; Tue, 8 Aug 2023 05:14:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=Fmz3qLzzVzkUuJIGAGdFC/9V+7J2bvmS0Cf4X/w7sXc=; b=iOK78fj43T/5QRw/NNz3entg05zFIbdqEyZRNeE65+/mKorpRyMKk7pUv4rPh8A5a6EZ ub97Acpqe16HTq/hf6SooVT6lPMj1KbtfW06FQjzllLYYzh7MNRFtLTCiUjRvt2m0fPW 3jpZKS67fFPj7RNjrsvmBU7PmS8cTkAH0infAN2rEAEF5QNC/rTMOwNUu/WkDQg0UbHa avTod7a1ML6jPJN85eVFtnPKSXvRIzGZW+bd1OEicYf0GBv3AuHaP8wWzi67YmU6UrxQ +a8nayoFd5w7KIv4XjHgAVlRm2BFMy4qxkqfWnYYhYypJVSsp7LrhdObNw9FbdJoCxPp Pg== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3saxbbsyh0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 08 Aug 2023 05:14:48 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3785EmIW026298 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 8 Aug 2023 05:14:48 GMT Received: from hu-imrashai-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Mon, 7 Aug 2023 22:14:43 -0700 From: Imran Shaik To: Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson CC: Taniya Das , Imran Shaik , , , , , Ajit Pandey , Jagadeesh Kona Subject: [PATCH 0/4] Add support for Qualcomm ECPRI clock controller Date: Tue, 8 Aug 2023 10:44:03 +0530 Message-ID: <20230808051407.647395-1-quic_imrashai@quicinc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: PYpobbKEwLOX1aBqXvUYJM5ZPLiVOMrV X-Proofpoint-GUID: PYpobbKEwLOX1aBqXvUYJM5ZPLiVOMrV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-08_03,2023-08-03_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=784 bulkscore=0 spamscore=0 clxscore=1015 impostorscore=0 malwarescore=0 phishscore=0 priorityscore=1501 adultscore=0 suspectscore=0 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308080046 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ECPRI clock controller support for QDU1000 and QRU1000. The clock controller has a special branch which requires an additional memory to be enabled/disabled before the branch ops. Imran Shaik (3): dt-bindings: clock: qcom: Add ECPRICC clocks for QDU1000 and QRU1000 clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000 arm64: dts: qcom: qdu1000: Add ECPRI clock controller Taniya Das (1): clk: qcom: branch: Add mem ops support for branch2 clocks .../bindings/clock/qcom,qdu1000-ecpricc.yaml | 68 + arch/arm64/boot/dts/qcom/qdu1000.dtsi | 14 + drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-branch.c | 38 + drivers/clk/qcom/clk-branch.h | 4 + drivers/clk/qcom/ecpricc-qdu1000.c | 3808 +++++++++++++++++ .../dt-bindings/clock/qcom,qdu1000-ecpricc.h | 192 + 8 files changed, 4133 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,qdu1000-ecpricc.yaml create mode 100644 drivers/clk/qcom/ecpricc-qdu1000.c create mode 100644 include/dt-bindings/clock/qcom,qdu1000-ecpricc.h -- 2.25.1