Received: by 2002:a05:6359:6284:b0:131:369:b2a3 with SMTP id se4csp5162925rwb; Tue, 8 Aug 2023 22:45:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFTw0B9RRNTApowIXZmO/kGUVdJbEUB3DlyR9/09ydAPheC8ErVaceZb83JAvNLkohYizH6 X-Received: by 2002:aa7:d889:0:b0:523:3825:7fd0 with SMTP id u9-20020aa7d889000000b0052338257fd0mr1506197edq.36.1691559940935; Tue, 08 Aug 2023 22:45:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691559940; cv=none; d=google.com; s=arc-20160816; b=r15OE/i5N1QwDt2VzmnDa3Z1ixlhvfsSw6/710VE3mHP75GflFGMTeH3D9okLYUhr7 B5yMG2C3sAfNfwbnUrnvWin5xjX4NK7R3+Mi5UPRC9kszyyBOWTGj1UXJbuorcqs2U6+ aXsy4VUyC6rPixbr7hOqXI5+Vp6FQHfMHgBj57YjwuzjL2BYQ6iIPw8pKxp0uMhJmom7 fbPtrPe+mibieGAVJvGyo6NAEA7Nz4kFOT5O7lfX4qC0PaggmoNdfXcTbawFniOm0oHe ZG8dECdQsB8dSVKXa4WywiDR+J/ZcVhDwpVVfuHK78jjNS8QW1jM7VMf93pzXNiduk5l B5IA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=8Tgm8JzVuI22rjMAGpHS/few0V4uWe2pc9jf8XOsZgY=; fh=eEd7LblIrGja5Fmv2jX2llH3Ec4TJPgn6yShTKD5xjU=; b=IVe3E/qSeFSe0MNK/O+ABNhB/tr4Qc61QXSliopGG5snsf6Or/+BrGiAqQJRZQZTVU EqpOvJ9ysVwTNyhEkn7kG0htWyp4zeDLLr/RNPjPxXvNyl1msZ/HyZhXNH/aGaO/d4rL JXezJbFDdv3xMeBR2KPIc3D+bntFWB2IEY6//S6mRvAZCp4wwraP8mUsYnNt8NBLMHWr lHgnbuVhhDxAv78HrcljSHjwtWH/ILYy19WSb1hChbSYlByY2oTQdoETMszxLaLKO22F bxpbn7jKGDPd51EFuAbpG1Cn26SntlflaRUWyAuRXre67I+RX2TQ/R3CY/btEbHEbgIV r7tg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=XW7gxuPL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c25-20020a056402121900b0052337f4212bsi3981424edw.108.2023.08.08.22.45.16; Tue, 08 Aug 2023 22:45:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=XW7gxuPL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230201AbjHIFBf (ORCPT + 99 others); Wed, 9 Aug 2023 01:01:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229823AbjHIFBd (ORCPT ); Wed, 9 Aug 2023 01:01:33 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86FAB1BCD; Tue, 8 Aug 2023 22:01:32 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37951MQD012725; Wed, 9 Aug 2023 00:01:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691557282; bh=8Tgm8JzVuI22rjMAGpHS/few0V4uWe2pc9jf8XOsZgY=; h=From:To:CC:Subject:Date; b=XW7gxuPLUtymLBBqz5g0EXxbGtYc3EruM8142MAYD/qfs0iWTQCFDBpNQx/J6g4Hz 9z2uxI5mlYwjEdWfXuCmS2P/ZFuoPYT333gGp3/g5HRpMW2GHye5PI5rvAA7jy9Uxj 94oKWmELCSReKXtTfqrV4NaCKmIO2h2slOgARoYY= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37951MHD028231 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Aug 2023 00:01:22 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Aug 2023 00:01:22 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Aug 2023 00:01:22 -0500 Received: from udit-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37951Igf009482; Wed, 9 Aug 2023 00:01:18 -0500 From: Udit Kumar To: , , , , CC: , , , , , , , Udit Kumar Subject: [PATCH] arm64: dts: ti: k3-j784s4-evm: Correct Pin mux offset for ADC Date: Wed, 9 Aug 2023 10:31:08 +0530 Message-ID: <20230809050108.751164-1-u-kumar1@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After splitting wkup_pmx pin mux for J784S4 into four regions. Pin mux offset for ADC nodes were not updated to align with new regions, due to this while probing ADC driver out of range error was seen. Pin mux offsets for ADC nodes are corrected in this patch. Fixes: 14462bd0b247 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets") Signed-off-by: Udit Kumar --- Reviewed pin mux for J784S4-EVM, AM69, J721S2-EVM and AM68 ADC seems to be last one to be fixed. In order to test this patch following drivers were built in as part of kernel CONFIG_MFD_TI_AM335X_TSCADC=y CONFIG_TI_AM335X_ADC=y dtbs_check is done after applying https://lore.kernel.org/all/20230721082654.27036-1-tony@atomide.com/ logs with patch https://gist.github.com/uditkumarti/54db4d5e49467442e1698e5af82d787b#file-with_patch (line 1128 and 1130) Original logs https://gist.github.com/uditkumarti/54db4d5e49467442e1698e5af82d787b#file-original_logs (line 942 and 946) arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 32 ++++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index edc1009b2d1e..b4ffa720209c 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -340,27 +340,27 @@ J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */ mcu_adc0_pins_default: mcu-adc0-default-pins { pinctrl-single,pins = < - J784S4_WKUP_IOPAD(0x134, PIN_INPUT, 0) /* (P36) MCU_ADC0_AIN0 */ - J784S4_WKUP_IOPAD(0x138, PIN_INPUT, 0) /* (V36) MCU_ADC0_AIN1 */ - J784S4_WKUP_IOPAD(0x13c, PIN_INPUT, 0) /* (T34) MCU_ADC0_AIN2 */ - J784S4_WKUP_IOPAD(0x140, PIN_INPUT, 0) /* (T36) MCU_ADC0_AIN3 */ - J784S4_WKUP_IOPAD(0x144, PIN_INPUT, 0) /* (P34) MCU_ADC0_AIN4 */ - J784S4_WKUP_IOPAD(0x148, PIN_INPUT, 0) /* (R37) MCU_ADC0_AIN5 */ - J784S4_WKUP_IOPAD(0x14c, PIN_INPUT, 0) /* (R33) MCU_ADC0_AIN6 */ - J784S4_WKUP_IOPAD(0x150, PIN_INPUT, 0) /* (V38) MCU_ADC0_AIN7 */ + J784S4_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (P36) MCU_ADC0_AIN0 */ + J784S4_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (V36) MCU_ADC0_AIN1 */ + J784S4_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (T34) MCU_ADC0_AIN2 */ + J784S4_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (T36) MCU_ADC0_AIN3 */ + J784S4_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (P34) MCU_ADC0_AIN4 */ + J784S4_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (R37) MCU_ADC0_AIN5 */ + J784S4_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (R33) MCU_ADC0_AIN6 */ + J784S4_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (V38) MCU_ADC0_AIN7 */ >; }; mcu_adc1_pins_default: mcu-adc1-default-pins { pinctrl-single,pins = < - J784S4_WKUP_IOPAD(0x154, PIN_INPUT, 0) /* (Y38) MCU_ADC1_AIN0 */ - J784S4_WKUP_IOPAD(0x158, PIN_INPUT, 0) /* (Y34) MCU_ADC1_AIN1 */ - J784S4_WKUP_IOPAD(0x15c, PIN_INPUT, 0) /* (V34) MCU_ADC1_AIN2 */ - J784S4_WKUP_IOPAD(0x160, PIN_INPUT, 0) /* (W37) MCU_ADC1_AIN3 */ - J784S4_WKUP_IOPAD(0x164, PIN_INPUT, 0) /* (AA37) MCU_ADC1_AIN4 */ - J784S4_WKUP_IOPAD(0x168, PIN_INPUT, 0) /* (W33) MCU_ADC1_AIN5 */ - J784S4_WKUP_IOPAD(0x16c, PIN_INPUT, 0) /* (U33) MCU_ADC1_AIN6 */ - J784S4_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */ + J784S4_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (Y38) MCU_ADC1_AIN0 */ + J784S4_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (Y34) MCU_ADC1_AIN1 */ + J784S4_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (V34) MCU_ADC1_AIN2 */ + J784S4_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (W37) MCU_ADC1_AIN3 */ + J784S4_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA37) MCU_ADC1_AIN4 */ + J784S4_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (W33) MCU_ADC1_AIN5 */ + J784S4_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (U33) MCU_ADC1_AIN6 */ + J784S4_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */ >; }; }; -- 2.34.1