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Subject: Re: [PATCH 0/3] Add Aspeed AST2600 I3C support
From:   Jeremy Kerr <jk@codeconstruct.com.au>
To:     Dylan Hung <dylan_hung@aspeedtech.com>,
        "alexandre.belloni@bootlin.com" <alexandre.belloni@bootlin.com>,
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        "conor+dt@kernel.org" <conor+dt@kernel.org>,
        "joel@jms.id.au" <joel@jms.id.au>,
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        "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
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Cc:     BMC-SW <BMC-SW@aspeedtech.com>,
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Date:   Wed, 09 Aug 2023 11:12:51 +0800
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Hi Dylan,

> Thank you for your review. I3C1 and I3C2 can only operate in low
> voltage (1.0V/1.2V), which is why there are no HVI3C1 and HVI3C2
> pinctrl definitions.

Yep, and that was config that I hadn't tested (so hadn't proposed
pinctrl definitions for those).

> > For 2/3 and 3/3, you're adding a reset control for the global
> > register block within the per-controller driver, but we can already
> > do that on a global basis with the existing syscon device. Hence
> > this earlier change:
> =C2=A0
> I followed your recommendation and verified that it worked on my end.

OK, excellent!

> Should I resend the pinctrl patch as a stand-alone submission?

Yes, and feel free to add:

Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au>

Did your test use my i3c DTS definitions? If so, that's a decent
datapoint that the config works (on something other than my setup), and
so I'll submit upstream. Alternatively, feel free to include it with
your pinctrl change, if you like.

Cheers,


Jeremy