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References: <20230807091801.17988-1-Wenhua.Lin@unisoc.com> <ef866767-b95a-8288-4a09-d29fd2717d0a@linux.alibaba.com>
In-Reply-To: <ef866767-b95a-8288-4a09-d29fd2717d0a@linux.alibaba.com>
From:   wenhua lin <wenhua.lin1994@gmail.com>
Date:   Wed, 9 Aug 2023 14:00:18 +0800
Message-ID: <CAB9BWhdLJp9NWp2+no=x9ZnJ1H32ZUfebiuK8BA3_wywFufqSg@mail.gmail.com>
Subject: Re: [PATCH] gpio: sprd: Two-dimensional arrays maintain pmic eic
To:     Baolin Wang <baolin.wang@linux.alibaba.com>
Cc:     Wenhua Lin <Wenhua.Lin@unisoc.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <brgl@bgdev.pl>,
        Andy Shevchenko <andy@kernel.org>,
        Orson Zhai <orsonzhai@gmail.com>,
        Chunyan Zhang <zhang.lyra@gmail.com>,
        linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org,
        Xiongpeng Wu <xiongpeng.wu@unisoc.com>
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Hi baolin:
1.We have recorded the offset, no need two-dimensional array unless you
have other strong reasons.

One-dimensional array reg[CACHE_NR_REGS] , the array to cache the EIC
registers., pmic eic has different channels, if the pmic eic does not
increase the offset two-dimensional array to maintain separately, it
will cause one of the eic channels to close the interrupt enable, and
it will be synchronized Disable other eic channel interrupt enable.

2.Why? you did not explain this in the commit log.
We will re-split the patch submission and explain our reasons for
modification in the submission information, thank you very much for
your review

3.Ditto. Why?
> +     pmic_eic->chip.can_sleep =3D true;
We will re-split the patch submission, thank you very much for your review

Baolin Wang <baolin.wang@linux.alibaba.com> =E4=BA=8E2023=E5=B9=B48=E6=9C=
=887=E6=97=A5=E5=91=A8=E4=B8=80 17:27=E5=86=99=E9=81=93=EF=BC=9A
>
>
>
> On 8/7/2023 5:18 PM, Wenhua Lin wrote:
> > Maintain the registers of each pmic eic through a Two-dimensional
> > array to avoid mutual interference.
> >
> > Signed-off-by: Wenhua Lin <Wenhua.Lin@unisoc.com>
>
> NAK. See below.
>
> > ---
> >   drivers/gpio/gpio-pmic-eic-sprd.c | 23 +++++++++++++----------
> >   1 file changed, 13 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpio/gpio-pmic-eic-sprd.c b/drivers/gpio/gpio-pmic=
-eic-sprd.c
> > index c3e4d90f6b18..8d67d130cbcf 100644
> > --- a/drivers/gpio/gpio-pmic-eic-sprd.c
> > +++ b/drivers/gpio/gpio-pmic-eic-sprd.c
> > @@ -57,7 +57,7 @@ struct sprd_pmic_eic {
> >       struct gpio_chip chip;
> >       struct regmap *map;
> >       u32 offset;
> > -     u8 reg[CACHE_NR_REGS];
> > +     u8 reg[SPRD_PMIC_EIC_NR][CACHE_NR_REGS];
>
> We have recorded the offset, no need two-dimensional array unless you
> have other strong reasons.
>
> >       struct mutex buslock;
> >       int irq;
> >   };
> > @@ -151,8 +151,8 @@ static void sprd_pmic_eic_irq_mask(struct irq_data =
*data)
> >       struct sprd_pmic_eic *pmic_eic =3D gpiochip_get_data(chip);
> >       u32 offset =3D irqd_to_hwirq(data);
> >
> > -     pmic_eic->reg[REG_IE] =3D 0;
> > -     pmic_eic->reg[REG_TRIG] =3D 0;
> > +     pmic_eic->reg[offset][REG_IE] =3D 0;
> > +     pmic_eic->reg[offset][REG_TRIG] =3D 0;
> >
> >       gpiochip_disable_irq(chip, offset);
> >   }
> > @@ -165,8 +165,8 @@ static void sprd_pmic_eic_irq_unmask(struct irq_dat=
a *data)
> >
> >       gpiochip_enable_irq(chip, offset);
> >
> > -     pmic_eic->reg[REG_IE] =3D 1;
> > -     pmic_eic->reg[REG_TRIG] =3D 1;
> > +     pmic_eic->reg[offset][REG_IE] =3D 1;
> > +     pmic_eic->reg[offset][REG_TRIG] =3D 1;
> >   }
> >
> >   static int sprd_pmic_eic_irq_set_type(struct irq_data *data,
> > @@ -174,13 +174,14 @@ static int sprd_pmic_eic_irq_set_type(struct irq_=
data *data,
> >   {
> >       struct gpio_chip *chip =3D irq_data_get_irq_chip_data(data);
> >       struct sprd_pmic_eic *pmic_eic =3D gpiochip_get_data(chip);
> > +     u32 offset =3D irqd_to_hwirq(data);
> >
> >       switch (flow_type) {
> >       case IRQ_TYPE_LEVEL_HIGH:
> > -             pmic_eic->reg[REG_IEV] =3D 1;
> > +             pmic_eic->reg[offset][REG_IEV] =3D 1;
> >               break;
> >       case IRQ_TYPE_LEVEL_LOW:
> > -             pmic_eic->reg[REG_IEV] =3D 0;
> > +             pmic_eic->reg[offset][REG_IEV] =3D 0;
> >               break;
> >       case IRQ_TYPE_EDGE_RISING:
> >       case IRQ_TYPE_EDGE_FALLING:
> > @@ -222,15 +223,15 @@ static void sprd_pmic_eic_bus_sync_unlock(struct =
irq_data *data)
> >                       sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_=
IEV, 1);
> >       } else {
> >               sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV,
> > -                                  pmic_eic->reg[REG_IEV]);
> > +                                  pmic_eic->reg[offset][REG_IEV]);
> >       }
> >
> >       /* Set irq unmask */
> >       sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IE,
> > -                          pmic_eic->reg[REG_IE]);
> > +                          pmic_eic->reg[offset][REG_IE]);
> >       /* Generate trigger start pulse for debounce EIC */
> >       sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_TRIG,
> > -                          pmic_eic->reg[REG_TRIG]);
> > +                          pmic_eic->reg[offset][REG_TRIG]);
> >
> >       mutex_unlock(&pmic_eic->buslock);
> >   }
> > @@ -335,6 +336,7 @@ static int sprd_pmic_eic_probe(struct platform_devi=
ce *pdev)
> >
> >       ret =3D devm_request_threaded_irq(&pdev->dev, pmic_eic->irq, NULL=
,
> >                                       sprd_pmic_eic_irq_handler,
> > +                                     IRQF_TRIGGER_LOW |
>
> Why? you did not explain this in the commit log.
>
> >                                       IRQF_ONESHOT | IRQF_NO_SUSPEND,
> >                                       dev_name(&pdev->dev), pmic_eic);
> >       if (ret) {
> > @@ -352,6 +354,7 @@ static int sprd_pmic_eic_probe(struct platform_devi=
ce *pdev)
> >       pmic_eic->chip.set_config =3D sprd_pmic_eic_set_config;
> >       pmic_eic->chip.set =3D sprd_pmic_eic_set;
> >       pmic_eic->chip.get =3D sprd_pmic_eic_get;
> > +     pmic_eic->chip.can_sleep =3D true;
>
> Ditto. Why?
>
> Please DO NOT squash different fixes into one patch.